DS80PCI800SQ Datasheet, PDF (3/45 Pages) Texas Instruments – DS80PCI800 2.5 Gbps / 5.0 Gbps / 8.0 Gbps 8 Channel PCI Express Repeater

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Pin Diagram
DS80PCI800
SNLS334E – APRIL 2011 – REVISED MARCH 2012
INB_0+ 1
INB_0- 2
INB_1+ 3
INB_1- 4
INB_2+ 5
INB_2- 6
INB_3+ 7
INB_3- 8
VDD 9
INA_0+ ¹⁰
INA_0- ¹¹
INA_1+ 12
INA_1- 13
VDD 14
INA_2+ 15
INA_2- 16
INA_3+ ¹⁷
INA_3- 18
SMBUS AND CONTROL
DAP = GND
45 OUTB_0+
44 OUTB_0-
43 OUTB_1+
42 OUTB_1-
41 VDD
40 OUTB_2+
39 OUTB_2-
38 OUTB_3+
37 OUTB_3-
36 VDD
35 OUTA_0+
34 OUTA_0-
33 OUTA_1+
32 OUTA_1-
31 OUTA_2+
30 OUTA_2-
29 OUTA_3+
28 OUTA_3-
Figure 1. DS80PCI800 Pin Diagram 54 lead
Pin Functions
Pin Name
Pin Number
Differential High Speed I/O's
INB_0+, INB_0-,INB_1+,
INB_1-,INB_2+, INB_2-
,INB_3+, INB_3-,
1, 2, 3, 4,
5, 6, 7, 8,
INA_0+, INA_0-,INA_1+,
INA_1-,INA_2+, INA_2-
,INA_3+, INA_3-
10, 11, 12, 13,
15, 16, 17, 18
Pin Descriptions
I/O, Type
Pin Description
I
Inverting and non-inverting differential inputs to bank B equalizer. A
gated on-chip 50Ω termination resistor connects INB_n+ to VDD and
INB_n- to VDD when enabled.
I
Inverting and non-inverting differential inputs to bank B equalizer. A
gated on-chip 50Ω termination resistor connects INA_n+ to VDD and
INA_n- to VDD when enabled.
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