DS80PCI800SQ Datasheet, PDF (12/45 Pages) Texas Instruments – DS80PCI800 2.5 Gbps / 5.0 Gbps / 8.0 Gbps 8 Channel PCI Express Repeater

DS80PCI800
SNLS334E – APRIL 2011 – REVISED MARCH 2012
www.ti.com
When in pin mode (ENSMB = 0), equalization and de-emphasis can be selected via pin for each side
independently. When de-emphasis is asserted VOD is automatically adjusted per the De- Emphasis table below.
The RXDET pins provides automatic and manual control for input termination (50Ω or >50KΩ). RATE setting is
also pin controllable with pin selections (Gen 1/2, auto detect and Gen 3). The receiver electrical idle detect
threshold is also adjustable via the SD_TH pin.
SMBUS Mode:
When in SMBus mode (ENSMB = 1), the VOD (output amplitude), equalization, de-emphasis, and termination
disable features are all programmable on a individual lane basis, instead of grouped by A or B as in the pin mode
case. Upon assertion of ENSMB, the EQx and DEMx functions revert to register control immediately. The EQx
and DEMx pins are converted to AD0-AD3 SMBus address inputs. The other external control pins (RATE,
RXDET and SD_TH) remain active unless their respective registers are written to and the appropriate override bit
is set, in which case they are ignored until ENSMB is driven low (pin mode). On power-up and when ENSMB is
driven low all registers are reset to their default state. If PRSNT is asserted while ENSMB is high, the registers
retain their current state.
Equalization settings accessible via the pin controls were chosen to meet the needs of most PCIe applications. If
additional fine tuning or adjustment is needed, additional equalization settings can be accessed via the SMBus
registers. Each input has a total of 256 possible equalization settings. The tables show the 16 setting when the
device is in pin mode. When using SMBus mode, the equalization, VOD and de-Emphasis levels are set by
registers.
The input control pins have been enhanced to have 4 different levels and provide a wider range of control
settings when ENSMB=0.
Pin Setting
0
R
Float
1
Table 1. 4–Level Control Pin Settings
Description ⁽¹⁾
Voltage at Pin
Tie 1kΩ to GND
0.03 x VDD
Tie 20kΩ to GND
1/3 x VDD
Float (leave pin open)
2/3 x VDD
Tie 1kΩ to VDD
0.98 x VDD
(1) The above required resistor value is for a single device. When there are multiple devices connected to the pull-up / pull-down resistor,
the value must scale with the number of devices. If 4 devices are connected to a single pull-up or pull-down, the 1kΩ resistor value
should be 250Ω. For the 20kΩ to GND, this should also scale to 5kΩ.
3.3V or 2.5V Supply Mode Operation
The DS80PCI800 has an optional internal voltage regulator to provide the 2.5V supply to the device. In 3.3V
mode operation, the VIN pin = 3.3V is used to supply power to the device. The internal regulator will provide the
2.5V to the VDD pins of the device and a 0.1 uF cap is needed at each of the 5 VDD pins for power supply de-
coupling (total capacitance should be ≤0.5 uF), and the VDD pins should be left open. The VDD_SEL pin must
be tied to GND to enable the internal regulator. In 2.5V mode operation, the VIN pin should be left open and 2.5V
supply must be applied to the 5 VDD pins to power the device. The VDD_SEL pin must be left open (no connect)
to disable the internal regulator.
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