DS80PCI800SQ Datasheet, PDF (27/45 Pages) Texas Instruments – DS80PCI800 2.5 Gbps / 5.0 Gbps / 8.0 Gbps 8 Channel PCI Express Repeater

DS80PCI800
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Address
0x1C
Register Name
CH2 - CHB2
IDLE, RXDET
0x1D
0x1E
CH2 - CHB2
EQ
CH2 - CHB2
VOD
0x1F
CH2 - CHB2
DEM
SNLS334E – APRIL 2011 – REVISED MARCH 2012
Table 9. SMBUS Slave Mode Register Map (continued)
Bit (s) Field
7:6 Reserved
5
IDLE_AUTO
4
IDLE_SEL
3:2 RXDET
1:0 Reserved
7:0 EQ Control
7
Short Circuit
Protection
6
RATE_SEL
5:3 Reserved
2:0 VOD Control
7
RXDET STATUS
6:5 RATE_DET
STATUS
4:3 Reserved
2:0 DEM Control
Type Default
R/W 0x00
R/W 0x2F
R/W 0xAD
R
0x02
R
R/W
R/W
Description
Set bits to 0.
1: Automatic IDLE detect
0: Allow IDLE_SEL control in bit 4
Note: override IDLE control.
1: Output is MUTED (electrical idle)
0: Output is ON
Note: override IDLE control.
00: Input is high-z impedance
01: Auto RX-Detect,
outputs test every 12 ms for 600 ms (50 times) then
stops; termination is high-z until detection; once
detected input termination is 50 Ω
10: Auto RX-Detect,
outputs test every 12 ms until detection occurs;
termination is high-z until detection; once detected
input termination is 50 Ω
11: Input is 50 Ω
Note: override RXDET pin.
Set bits to 0.
IB2 EQ Control - total of 256 levels.
See Table 2.
1: Enable the short circuit protection
0: Disable the short circuit protection
1: Gen 1/2,
0: Gen 3
Note: override the RATE pin.
Set bits to default value - 101.
OB2 VOD Control
000: 0.7 V
001: 0.8 V
010: 0.9 V
011: 1.0 V
100: 1.1 V
101: 1.2 V (default)
110: 1.3 V
111: 1.4 V
Observation bit for RXDET CH2 - CHB2.
1: RX = detected
0: RX = not detected
Observation bit for RATE_DET CH2 - CHB2.
00: GEN1 (2.5G)
01: GEN2 (5G)
11: GEN3 (8G)
Set bits to 0.
OB2 DEM Control
000: 0 dB
001: –1.5 dB
010: –3.5 dB (default)
011: –5 dB
100: –6 dB
101: –8 dB
110: –9 dB
111: –12 dB
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