BQ25872 Datasheet, PDF (27/68 Pages) Texas Instruments – Battery Switch Charger

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bq25872
SLUSCQ6 – OCTOBER 2016
Feature Description (continued)
8.3.6.5 Slave Address and Data Direction bit
After the START, a slave address is sent. This address is 7 bits long followed by the eighth bit as a data direction
bit (bit R/W). A zero indicates a transmission (WRITE) and a one indicates a request for data (READ).
SDA
SCL
S
START
1-7
ADDRESS
1
7
1
S
Slave Address
0
8
9
1-7
8
9
1-7
8
9
P
R/W
ACK
DATA
ACK
DATA
Figure 17. Complete Data Transfer
ACK
STOP
1
ACK
8
Reg Address
1
1
ACK
S
7
Slave Address
1
1
1
ACK
Figure 18. Single Read
8
Data
1
1
NCK
P
If the register address is not defined, the charger device send back NACK and go back to the idle state.
8.3.6.6 Multi-Read and Multi-Write
The charger device supports multi-read and multi-write on REG00 through REG08.
1
7
1
1
S
Slave Address
0
ACK
8
Reg Address
1
1
ACK
S
7
Slave Address
1
1
1
ACK
8
Data at Address
1
ACK
8
Data at Address +1
1
ACK
8
Data at Addr+N
Figure 19. Multi-Read
1
1
NCK
P
EVENT_1, EVENT_2, and EVENT_3 keep all the information from last read until the host issues a new read. For
example, if VBUS_OVP fault occurs but recovers later, the fault register EVENT_1 reports the fault when it is
read the first time, but returns to normal when it is read the second time. In order to get the fault information at
present, the host has to read EVENT_1, EVENT_2, and EVENT_3 for the second time.
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