BQ25872 Datasheet, PDF (25/68 Pages) Texas Instruments – Battery Switch Charger

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bq25872
SLUSCQ6 – OCTOBER 2016
Feature Description (continued)
8.3.6 I²C Serial Interface
The device uses I²C compatible interface for flexible charging parameter programming and instantaneous device
status reporting. I²C communication to the device is available as long as V_VUSB > VUSB_UVLO or V_VBUS >
VBUS_UVLOor V_VOUT > VOUT_UVLO. I²C™ is a bi-directional 2-wire serial interface developed by Philips
Semiconductor (now NXP Semiconductors). Only two bus lines are required, a serial data line (SDA) and a serial
clock line (SCL). Devices can be considered as masters or slaves when performing data transfers. A master is
the device which initiates a data transfer on the bus and generates the clock signals to permit that transfer. At
that time, any device addressed is considered a slave.
The device operates as a slave device with address set by the ADDR pin. The device receives control inputs
from the master device like micro controller or a digital signal processor through REG00-REG29 and REG40.
Register read between REG29 and REG39 beyond REG40 returns 0xFF. The I²C interface supports standard
mode (up to 100 kbit/s), fast mode (up to 400 kbit/s), and fast mode plus (up to 1 Mbit/s). Connect the SDA and
SCL pins to the positive supply voltage via a current source or pull-up resistor. When the bus is free, both lines
are high. The SDA and SCL pins are open drain.
The device supports 7-bit addressing. The 8th bit will change depending upon the command (read or write) that
is issued. The device’s 7-bit address is defined as shown in the image below.
Slave Address
1
1
0
0
1
0
1 R/W
Figure 13. Slave Address
8.3.6.1 Data Validity
The data on the SDA line must be stable during the HIGH period of the clock. The HIGH or LOW state of the
data line can only change when the clock signal on the SCL line is LOW. One clock pulse is generated for each
data bit transferred.
SDA
SCL
Data line stable;
Data valid
Change of data
allowed
Figure 14. Bit Transfer on the I²C Bus
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