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BQ25872 Datasheet, PDF (19/68 Pages) Texas Instruments – Battery Switch Charger
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bq25872
SLUSCQ6 – OCTOBER 2016
Feature Description (continued)
8.3.5 Protection Features
The device contains various protection features that are active depending upon the states of various inputs:
• If VVUSB > VUSBPRESENT, VVBUS > VBUSPRESENT, VVOUT > VOUTPRESENT, EN asserted high, and CHG_EN = ‘1’
– Active protection: VBUS_OVP, IBUS_OCP, VOUT_OVP, VBAT_OVP, IBAT_OCP, SCP, RCP,
VDROP_OVP
• If VVUSB > VUSBPRESENT, VVBUS > VBUSPRESENT, VVOUT > VOUTPRESENT, EN asserted high, and CHG_EN = ‘0’
– Active protection: VBUS_OVP, IBUS_OCP, VOUT_OVP, IBAT_OCP, SCP, RCP, VDROP_OVP
– VBAT_OVP active until VBAT OVP condition is over (protection becomes inactive on falling threshold of
VBAT_OVP, which is 102% of VBAT_REG setting)
• If VVUSB > VUSBPRESENT, EN asserted low, and CHG_EN = ‘0’
– Active protection: VUSB_OVP
• If VVUSB < VUSBPRESENT, VVBUS > VBUSPRESENT, VVOUT > VOUTPRESENT, and CHG_EN = ‘0’
– Active protection: VUSB_OVP
– VOUTPRESENT, VBUSPRESENT, and VUSBPRESENT comparators active
Tripping any of these protection faults will cause the battery switch to be disabled (unless the protection is
disabled in EVENT_1_EN and EVENT_2_EN registers) and an interrupt to be issued on the INT pin (see INT
Pin, EVENT_x Registers, EVENT_x_MASK Registers section for details of when INT is toggled).
8.3.5.1 Reverse Current Protection (RCP)
The device monitors the current flow from VBUS to VOUT to ensure there is no reverse current (current flow
from VOUT to VBUS). In an event that a reverse current flow is detected, the battery switch is disabled within
tOFF_FET after a deglitch time of tIREV and CHG_EN is set to ‘0’. Host intervention is required to set CHG_EN to ‘1’
to enable the power switch again. The RCP threshold is set by the RCP_SET bit.
Reverse current protection is always active when the device has valid power. The RCP threshold is based on the
RCP_SET bit setting in the CONTROL register. It has a response delay of tIREV. When RCP is tripped,
IBUS_IREV_FLT bit in the EVENT_1 register is set to ‘1’, and INT is asserted low to alert the host (unless
masked by IBUS_IREV_MASK).
8.3.5.2 Internal Thermal Shutdown
The device monitors the die junction temperature and the battery switch is disabled when device junction
temperature reaches TSHUT within tOFF_FET and CHG_EN is set to ‘0’ . When the internal thermal shutdown is
triggered, INT is asserted low to alert the host, and the device temperature must drop by TSHUT_HYS before the
battery switch can be enabled again (host must enable battery switch). While the TSHUT condition persists (and
before the junction temperature dropped by TSHUT_HYS), all other functions are unaffected.
If the DIE_TEMP_FLT threshold has been crossed, TSHUT_FLT bit in EVENT_2 register is set to ‘1’, and INT
will assert low to alert the host (no mask bit for TSHUT_FLT). After the TSHUT_FLT is cleared by the host with a
register read, it is possible the TSHUT_FLT bit is set again if the die junction temperature has not reduced by
TSHUT_HYS.
DIE_TEMP_FLT allows the user to select TSHUT thresholds between different junction temperatures as the
thermal shutdown point. DIE_TEMP_ADC is the die (junction) temperature of the device that is measured via the
10-bit ADC.
The ADC measurement (DIE_TEMP_ADC) is independent of the TSHUT fault that triggers TSHUT_FLT in the
EVENT_x register. Therefore, it is possible to have the ADC output value be a higher value that the
DIE_TEMP_FLT threshold, while the TSHUT fault has not yet been triggered.
8.3.5.3 Input Overvoltage Protection
The device integrates the functionality of an overvoltage protector. The device can be paired with an external N-
channel FET to block input voltages higher than the setting programmed by OVPSET pin. The device senses the
input (via VUSB) and turns the external N-channel FET on or off (via OVPGATE pin) to protect the downstream
system. This eliminates the need for a separate OVP chip to protect the overall system. The integrated OVP
feature has a reaction time of tOFF_FLT (the actual time to turn off OVP FET will be longer and depends upon the
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