DS100KR401_13 Datasheet, PDF (26/38 Pages) Texas Instruments – Ultra Low Power, 4 Lane (8-channel, bi-directional) Repeater for Data-rates up to 10.3 Gbps

DS100KR401
SNLS395B – JANUARY 2012 – REVISED MARCH 2012
Address
0x43
Register Name
CH7 - CHA3
DEM
0x44
CH7 - CHA3
IDLE Threshold
0x51
Device ID
Table 8. SMBUS Slave Mode Register Map (continued)
Bit (s) Field
7
STATUS
6:5 STATUS
4:3 Reserved
2:0 DEM Control
7:4 Reserved
3:2 IDLE thd
1:0 IDLE tha
7:5 VERSION
4:0 ID
Type
R
R
R/W
R/W
Default
0x02
R/W 0x00
R
0x44
Description
Observation bit for CH7 - CHA3.
Observation bit for CH7 - CHA3.
Set bits to 0.
OA3 DEM Control
000: 0 dB
001: –1.5 dB
010: –3.5 dB (default)
011: –5 dB
100: –6 dB
101: –8 dB
110: –9 dB
111: –12 dB
Set bits to 0.
De-assert threshold
00 = 110 mVp-p (default)
01 = 100 mVp-p
10 = 150 mVp-p
11 = 130 mVp-p
Note: override the SD_TH pin.
Assert threshold
00 = 180 mVp-p (default)
01 = 160 mVp-p
10 = 210 mVp-p
11 = 190 mVp-p
Note: override the SD_TH pin.
010'b
00100'b
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