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DS100KR401_13 Datasheet, PDF (13/38 Pages) Texas Instruments – Ultra Low Power, 4 Lane (8-channel, bi-directional) Repeater for Data-rates up to 10.3 Gbps
DS100KR401
www.ti.com
SNLS395B – JANUARY 2012 – REVISED MARCH 2012
EEPROM Address
Byte
Description
0
Bit 7
CRC EN
Value
Description
Value
Description
Value
Description
Value
Description
Value
Description
Value
Description
Value
Description
Value
Description
Value
Description
Value
Description
Value
Description
Value
Description
Value
Description
Value
Description
Value
Description
Value
0
1 RES
0
2 Max EEPROM
Burst size[7]
0
3 PWDN_ch7
0
4 RES_1
0
5 RES
0
6 Ovrd_RES
0
7 RD_delay_sel_3
0
8 ch0_BST_7
0
9 ch0_Sel_scp
1
10 ch0_DEM_2
0
11 ch1_Idle_auto
0
12 ch1_BST_3
1
13 ch1_RES_0
1
14 ch1_idle_tha_1
0
15 ch2_BST_7
0
Table 5. EEPROM Register Map - Single Device with Default Value
Bit 6
Address Map
Present
0
RES
0
Max EEPROM
Burst size[6]
0
PWDN_ch6
0
RES_0
0
RES
0
Ovrd_RES
0
RD_delay_sel_2
0
ch0_BST_6
0
ch0_Sel_mode
0
ch0_DEM_1
1
ch1_Idle_sel
0
ch1_BST_2
1
ch1_VOD_2
1
ch1_idle_tha_0
0
ch2_BST_6
0
Bit 5
EEPROM > 256
Bytes
0
RES
0
Max EEPROM
Burst size[5]
0
PWDN_ch5
0
PWDN_INPUTS
0
RES
0
Ovrd_RES
0
RD_delay_sel_1
0
ch0_BST_5
1
ch0_RES_2
1
ch0_DEM_0
0
ch1_RES_1
0
ch1_BST_1
1
ch1_VOD_1
0
ch1_idle_thd_1
0
ch2_BST_5
1
Bit 4
RES
0
RES
0
Max EEPROM
Burst size[4]
0
PWDN_ch4
0
PWDN_OSC
0
RES
0
Ovrd_RES
0
RD_delay_sel_0
0
ch0_BST_4
0
ch0_RES_1
0
ch0_Slow
0
ch1_RES_0
0
ch1_BST_0
1
ch1_VOD_0
1
ch1_idle_thd_0
0
ch2_BST_4
0
Bit 3
DEVICE
COUNT[3]
0
RES
0
Max EEPROM
Burst size[3]
0
PWDN_ch3
0
Ovrd_RESET
0
RES
0
Ovrd_RES
0
ch0_Idle_auto
0
ch0_BST_3
1
ch0_RES_0
1
ch0_idle_tha_1
0
ch1_BST_7
0
ch1_Sel_scp
1
ch1_DEM_2
0
ch2_Idle_auto
0
ch2_BST_3
1
Bit 2
DEVICE
COUNT[2]
0
RES
0
Max EEPROM
Burst size[2]
0
PWDN_ch2
0
RES
0
RES_btb_en
1
rx_delay_sel_2
1
ch0_Idle_sel
0
ch0_BST_2
1
ch0_VOD_2
1
ch0_idle_tha_0
0
ch1_BST_6
0
ch1_Sel_mode
0
ch1_DEM_1
1
ch2_Idle_sel
0
ch2_BST_2
1
Bit 1
DEVICE
COUNT[1]
0
RES
0
Max EEPROM
Burst size[1]
0
PWDN_ch1
0
RES
0
Ovrd_RES
0
rx_delay_sel_1
1
ch0_RES_1
0
ch0_BST_1
1
ch0_VOD_1
0
ch0_idle_thd_1
0
ch1_BST_5
1
ch1_RES_2
1
ch1_DEM_0
0
ch2_RES_1
0
ch2_BST_1
1
BIt 0
DEVICE
COUNT[0]
0
RES
0
Max EEPROM
Burst size[0]
0
PWDN_ch0
0
RES
0
Ovrd_RES
0
rx_delay_sel_0
1
ch0_RES_0
0
ch0_BST_0
1
ch0_VOD_0
1
ch0_idle_thd_0
0
ch1_BST_4
0
ch1_RES_1
0
ch1_Slow
0
ch2_RES_0
0
ch2_BST_0
1
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