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DM3730_17 Datasheet, PDF (254/280 Pages) Texas Instruments – Digital Media Processors
DM3730, DM3725
SPRS685D – AUGUST 2010 – REVISED JULY 2011
www.ti.com
Table 6-120. MMC1 Interface Switching Characteristics—Standard MMC and MMC Identification Modes(7)
(continued)
NO.
PARAMETER
OPP100
MIN
MAX
tF(clk)
Fall time, output clk
tR(data)
Rise time, output data
tF(data)
Fall time, output data
MMC5 td(CLKOH-CMD) Delay time, mmc1_clk rising clock edge to mmc1_cmd
4.1
transition
10
10
10
37.6
MMC6 td(CLKOH-DATx) Delay time, mmc1_clk rising clock edge to
mmc1_dat[n:0](4) transition
4.1
37.6
MMC1 Interface (3.0-V IO)
tR(clk)
Rise time, output clk
tF(clk)
Fall time, output clk
tR(data)
Rise time, output data
tF(data)
Fall time, output data
MMC5 td(CLKOH-CMD) Delay time, mmc1_clk rising clock edge to mmc1_cmd
4.1
transition
10
10
10
10
37.6
MMC6 td(CLKOH-DATx) Delay time, mmc1_clk rising clock edge to
mmc1_dat[n:0](4) transition
4.1
37.6
(1) Related with the output clock maximum and minimum frequencies programmable in MMC module.
(2) PO = output clock period in ns
(3) The jitter probability density can be approximated by a Gaussian function.
(4) In mmc1_dat[n:0], n is equal to 3.
(5) The X parameter is defined as follows:
OPP50
MIN
MAX
10
10
10
4.3
79
4.3
79
UNIT
ns
ns
ns
ns
ns
10
ns
10
ns
10
ns
10
ns
4.3
79
ns
4.3
79
ns
CLKD
1 or Even
Odd
X
0.5
(trunk[CLKD/2]+1)/CLKD
All required details about clock division factor CLKD can be found in the AM/DM37x Multimedia Device Technical Reference Manual
(literature number SPRUGN4).
(6) The Y parameter is defined as follows:
CLKD
1 or Even
Odd
Y
0.5
(trunk[CLKD/2])/CLKD
All required details about clock division factor CLKD can be found in the AM/DM37x Multimedia Device Technical Reference Manual
(literature number SPRUGN4).
(7) See Section 4.3.4, Processor Clocks.
MMC1
MMC2
mmc1_clk
MMC3
MMC4
mmc1_cmd
MMC7
MMC8
mmc1_dat[3:0]
SWPS038-102
Figure 6-69. MMC1 Interface—Standard MMC and MMC Identification Modes—Data/Command Receive
254 Timing Requirements and Switching Characteristics
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