DM3730_17 Datasheet, PDF (169/280 Pages) Texas Instruments – Digital Media Processors

DM3730, DM3725
www.ti.com
SPRS685D – AUGUST 2010 – REVISED JULY 2011
6.4.1.2 GPMC/NOR Flash—Asynchronous Mode
Table 6-6 and Table 6-7 assume testing over the recommended operating conditions and electrical
characteristic conditions below (see Figure 6-7 through Figure 6-12).
Table 6-5. GPMC/NOR Flash Timing Conditions—Asynchronous Mode
TIMING CONDITION PARAMETER
Input Conditions
t_R
Input signal rise time
t_F
Input signal fall time
Output Conditions
C_LOAD
Output load capacitance⁽¹⁾
(1) The load setting of the IO buffer: LB0 = 0.
VALUE
1.8
1.8
16
UNIT
ns
ns
pF
Table 6-6. GPMC/NOR Flash Internal Timing Parameters—Asynchronous Mode^{(1) (2) (4)}
NO.
PARAMETER
OPP100
OPP50
MIN
MAX
MIN
MAX
FI1 Delay time, output data gpmc_d[15:0] generation from internal
functional clock GPMC_FCLK⁽³⁾
6.6
7.0
FI2 Delay time, input data gpmc_d[15:0] capture from internal functional
4.4
7.0
clock GPMC_FCLK⁽³⁾
FI3 Delay time, output chip select gpmc_ncsx generation from internal
functional clock GPMC_FCLK⁽³⁾
6.5
7.0
FI4 Delay time, output address gpmc_a[27:1] generation from internal
functional clock GPMC_FCLK⁽³⁾
7.6
7.0
FI5 Delay time, output address gpmc_a[27:1] valid from internal functional
7.6
7.0
clock GPMC_FCLK⁽³⁾
FI6 Delay time, output lower-byte enable/command latch enable
gpmc_nbe0_cle, output upper-byte enable gpmc_nbe1 generation
from internal functional clock GPMC_FCLK⁽³⁾
6.5
7.0
FI7 Delay time, output enable gpmc_noe generation from internal
functional clock GPMC_FCLK⁽³⁾
5.8
7.0
FI8 Delay time, output write enable gpmc_nwe generation from internal
7.0
7.0
functional clock GPMC_FCLK⁽³⁾
FI9 Skew, internal functional clock GPMC_FCLK⁽³⁾
100
170
FI10 Delay time, IO direction generation from internal functional clock
GPMC_FCLK⁽³⁾
6.3
7.0
(1) The internal parameters table must be used to calculate data access time stored in the corresponding CS register bit field.
(2) Internal parameters are referred to the GPMC functional internal clock which is not provided externally.
(3) GPMC_FCLK is general-purpose memory controller internal functional clock.
(4) See Section 4.3.4, Processor Clocks.
UNIT
ns
ns
ns
ns
ns
ns
ns
ns
ps
ps
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Timing Requirements and Switching Characteristics 169
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