THS1007_14 Datasheet, PDF (25/34 Pages) Texas Instruments – 10-BIT, 4 ANALOG INPUT, 6-MSPS, SIMULTANEOUS SAMPLING ANALOG-TO-DIGITAL CONVERTER

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THS1007
SLAS286B − AUGUST 2000− REVISED DECEMBER 2010
TIMING AND SIGNAL DESCRIPTION OF THE THS1007
The reading from the THS1007 and writing to the THS1007 is performed by using the chip select inputs (CS0,
CS1), the write input WR and the read input RD. The write input is configurable to a combined read/write input
(R/W). This is desired in cases where the connected processor consists of a combined read/write output signal
(R/W). The two chip select inputs can be used to interface easily to a processor.
Reading from the THS1007 takes place by an internal RD_int signal, which is generated from the logical
combination of the external signals CS0, CS1 and RD (see Figure 33). This signal is then used to strobe the
words and to enable the output buffers. The last external signal (either CS0, CS1 or RD) to become valid makes
RD_int active while the write input (WR) is inactive. The first of those external signals switching to its inactive state
deactivates RD_int again.
Writing to the THS1007 takes place by an internal WR_int signal, which is generated from the logical combination
of the external signals CS0, CS1 and WR. This signal strobes the control words into the control registers 0 and
1. The last external signal (either CS0, CS1 or WR) to become valid switches WR_int active while the read input
(RD) is inactive. The first of those external signals going to its inactive state deactivates WR_int again.
CS0
RD
CS1
RD
WR
WR
Data Bits
Control/Data
Registers
Figure 33. Logical Combination of CS0, CS1, RD, and WR
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