THS1007_14 Datasheet, PDF (18/34 Pages) Texas Instruments – 10-BIT, 4 ANALOG INPUT, 6-MSPS, SIMULTANEOUS SAMPLING ANALOG-TO-DIGITAL CONVERTER

THS1007
SLAS286B − AUGUST 2000− REVISED DECEMBER 2010
www.ti.com
Figure 31 shows the conversion timing when four analog input channels are selected. The maximum throughput
rate per channel is 1.5 MSPS in this mode. The data flow in the bottom of the figure shows in which order the
converted data is available to the databus. The SYNC signal is active low when the data of channel one is
available to the data bus. The data of channel one is followed by the data of channel two, the data of channel
three and the data of channel four before channel one is again available to the databus and SYNC is active low.
Sample N
Channel 1, 2, 3, 4
Sample N+1
Channel 1, 2, 3, 4
AIN
t_d(A)
t_{w(CONV_CLKH)}
t_d(pipe)
t_{w(CONV_CLKL)}
CONV_CLK
t_c
t_{su(CONV_CLKL-READL)}
t_{su(READH-CONV_CLKL)}
READ^†
SYNC
t_{su(CONV_CLKL-SYNCL)}
t_{su(CONV_CLKL-SYNCH)}
Data N−1
Channel 1
Data N−1
Channel 2
Data N−1
Channel 3
Data N−1
Channel 4
Data N
Channel 1
Data N
Channel 2
Data N
Channel 3
†_{READ is the logical combination from CS0, CS1 and RD}
Figure 31. Timing of Continuous Conversion Mode (4-channel operation)
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