 English |
|
|
|
|
|
|
|
| DMVA3 Datasheet, PDF (247/287 Pages) Texas Instruments – DMVA3 and DMVA4 DaVinc Digital Media Processor | |||
| |||
| ◁ |
www.ti.com
DMVA3, DMVA4
SPRS872B â MAY 2013 â REVISED DECEMBER 2013
DVDD_DDR[0]
Rcp
Cac
A2
A3
AT
A2
A3
AT
Rcp
0.1 µF
=
Figure 8-71. CK Routing for Two Mirrored DDR3 Devices
Rtt
A2
A3
AT
Vtt
=
Figure 8-72. ADDR_CTRL Routing for Two Mirrored DDR3 Devices
8.14.3.14.3 One DDR3 Device
A single DDR3 device is supported on the DDR EMIF consisting of one x16 DDR3 device arranged as
one bank (CS), 16 bits wide.
8.14.3.14.3.1 CK and ADDR_CTRL Topologies, One DDR3 Device
Figure 8-73 shows the topology of the CK net classes and Figure 8-74 shows the topology for the
corresponding ADDR_CTRL net classes.
Copyright © 2013, Texas Instruments Incorporated
Submit Documentation Feedback
Product Folder Links: DMVA3
Peripheral Information and Timings 247
|
▷ |
German
Russian
Spanish
Italian
Polish
Chinese
Japanese
Korean
French
Portuguese