DMVA3 Datasheet, PDF (246/287 Pages) Texas Instruments – DMVA3 and DMVA4 DaVinc Digital Media Processor

DMVA3, DMVA4
SPRS872B – MAY 2013 – REVISED DECEMBER 2013
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DVDD_DDR[0]
A2
A3
A2
A3
=
Rcp
AT
AT
Rcp
Cac
0.1 µF
Figure 8-69. CK Routing for Two Single-Side DDR3 Devices
Rtt
A2
A3
AT
Vtt
=
Figure 8-70. ADDR_CTRL Routing for Two Single-Side DDR3 Devices
To save PCB space, the two DDR3 memories may be mounted as a mirrored pair at a cost of increased
routing and assembly complexity. Figure 8-71 and Figure 8-72 show the routing for CK and ADDR_CTRL,
respectively, for two DDR3 devices mirrored in a single-pair configuration.
246 Peripheral Information and Timings
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