OMAP3515DCUS Datasheet, PDF (245/264 Pages) Texas Instruments – OMAP3515 and OMAP3503 Applications Processors

OMAP3515, OMAP3503
www.ti.com
SPRS505H – FEBRUARY 2008 – REVISED OCTOBER 2013
CLKD
1 or Even
Odd
Table 6-136. Y Parameters
Y
0.5
(trunk[CLKD/2])/CLKD
For details about clock division factor CLKD, see the OMAP35x Technical Reference Manual (TRM)
[literature number SPRUF98].
mmcx_clk
mmcx_cmd
mmcx_dat[3:0]
HSSD1
HSSD3
HSSD7
HSSD2
HSSD4
HSSD8
In mmcx, x is equal to 1, 2, or 3.
Figure 6-65. MMC/SD/SDIO – High-Speed SD Mode – Data/Command Receive
030-106
mmcx_clk
mmcx_cmd
mmcx_dat[3:0]
HSSD1
HSSD5
HSSD6
HSSD2
HSSD5
HSSD6
In mmcx, x is equal to 1, 2, or 3.
Figure 6-66. MMC/SD/SDIO – High-Speed SD Mode – Data/Command Transmit
030-107
6.7.1.5 MMC/SD/SDIO in Standard SD Mode
Table 6-138 and Table 6-139 assume testing over the recommended operating conditions and electrical
characteristic conditions (see Figure 6-67).
Standard SD Mode
Input Conditions
t_R
t_F
Output Conditions
C_LOAD
Table 6-137. MMC/SD/SDIO Timing Conditions – Standard SD Mode
TIMING CONDITION PARAMETER
VALUE
Input signal rise time
10
Input signal fall time
10
Output load capacitance
40
UNIT
ns
ns
pF
Copyright © 2008–2013, Texas Instruments Incorporated
TIMING REQUIREMENTS AND SWITCHING CHARACTERISTICS 245
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