TCA9539_15 Datasheet, PDF (23/42 Pages) Texas Instruments – Low Voltage 16-Bit I2C and SMBus Low-Power I/O Expander

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TCA9539
SCPS202B – OCTOBER 2009 – REVISED OCTOBER 2015
SCL
123456789
Slave Address
Command Byte
Data to Port 0
SDA _{S 1 1 1 0 1 A1 A0 0 A 0 0 0 0 0 0 1 0 A} 0.7
Data 0
Start Condition
Write to Port
R/W Acknowledge
From Slave
Acknowledge
From Slave
Data to Port 1
0.0 A 1.7
Data 1
Acknowledge
From Slave
1.0 A P
Data Out from Port 0
Data Out from Port 1
t_pv
Figure 30. Write to Output Port Registers
Data Valid
t_pv
8.6.3.1.2 Reads
Reading from a slave is very similar to writing, but requires some additional steps. In order to read from a slave,
the master must first instruct the slave which register it wishes to read from. This is done by the master starting
off the transmission in a similar fashion as the write, by sending the address with the R/W bit equal to 0
(signifying a write), followed by the register address it wishes to read from. Once the slave acknowledges this
register address, the master will send a START condition again, followed by the slave address with the R/W bit
set to 1 (signifying a read). This time, the slave will acknowledge the read request, and the master will release
the SDA bus but will continue supplying the clock to the slave. During this part of the transaction, the master will
become the master-receiver, and the slave will become the slave-transmitter.
The master will continue to send out the clock pulses, but will release the SDA line so that the slave can transmit
data. At the end of every byte of data, the master will send an ACK to the slave, letting the slave know that it is
ready for more data. Once the master has received the number of bytes it is expecting, it will send a NACK,
signaling to the slave to halt communications and release the bus. The master will follow this up with a STOP
condition.
See Register Descriptions section to see list of the TCA9539's internal registers and a description of each one.
Figure 31 shows an example of reading a single byte from a slave register.
Master controls SDA line
Slave controls SDA line
Read from one register in a device
Device (Slave) Address (7 bits)
Register Address N (8 bits)
Device (Slave) Address (7 bits)
Data Byte from Register N (8 bits)
S 1 1 1 0 1 A1 A0 0 A B7 B6 B5 B4 B3 B2 B1 B0 A Sr 1 1 1 0 1 A1 A0 1 A D7 D6 D5 D4 D3 D2 D1 D0 NA P
START
R/W=0 ACK
ACK Repeated START
R/W=1 ACK
Figure 31. Read from Register
NACK STOP
After a restart, the value of the register defined by the command byte matches the register being accessed when
the restart occurred. For example, if the command byte references Input Port 1 before the restart, and the restart
occurs when Input Port 0 is being read, the stored command byte changes to reference Input Port 0. The original
command byte is forgotten. If a subsequent restart occurs, Input Port 0 is read first. Data is clocked into the
register on the rising edge of the ACK clock pulse. After the first byte is read, additional bytes may be read, but
the data now reflect the information in the other register in the pair. For example, if Input Port 1 is read, the next
byte read is Input Port 0.
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