ADS1291_14 Datasheet, PDF (23/75 Pages) Texas Instruments – Power, 2-Channel, 24-Bit Analog Front-End for Biopotential Measurements

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ADS1291
ADS1292
ADS1292R
SBAS502B – DECEMBER 2011 – REVISED SEPTEMBER 2012
ADC ΔΣ Modulator
Each channel of the ADS1291, ADS1292, and ADS1292R has a 24-bit ΔΣ ADC. This converter uses a second-
order modulator optimized for low-power applications. The modulator samples the input signal at the rate of f_MOD
= f_CLK / 4 or f_CLK / 16, as determined by the CLK_DIV bit. In both cases, the sampling clock has a typical value of
128 kHz. As in the case of any ΔΣ modulator, the ADS1291, ADS1292, and ADS1292R noise is shaped until
f_MOD / 2, as shown in Figure 25. The on-chip digital decimation filters explained in the Digital Decimation Filter
section can be used to filter out the noise at higher frequencies. These on-chip decimation filters also provide
antialias filtering. This feature of the ΔΣ converters drastically reduces the complexity of analog antialiasing filters
that are typically needed with nyquist ADCs.
0
−10
−20
−30
−40
−50
−60
−70
−80
−90
−100
−110
−120
−130
−140
−150
−160
0.001
0.01
0.1
1
Normalized Frequency (f_IN/f_MOD)
G001
Figure 25. Power Spectral Density (PSD) of a ΔΣ Modulator (4-Bit Quantizer)
DIGITAL DECIMATION FILTER
The digital filter receives the modulator output and decimates the data stream. By adjusting the amount of
filtering, tradeoffs can be made between resolution and data rate: filter more for higher resolution, filter less for
higher data rates. Higher data rates are typically used in ECG applications for implement software pace detection
and ac lead-off detection.
The digital filter on each channel consists of a third-order sinc filter. The decimation ratio on the sinc filters can
be adjusted by the DR bits in the CONFIG1 register (see the Register Map section for details). This setting is a
global setting that affects all channels and, therefore, in a device all channels operate at the same data rate.
Sinc Filter Stage (sinx / x)
The sinc filter is a variable decimation rate, third-order, low-pass filter. Data are supplied to this section of the
filter from the modulator at the rate of f_MOD. The sinc filter attenuates the high-frequency noise of the modulator,
then decimates the data stream into parallel data. The decimation rate affects the overall data rate of the
converter.
Equation 8 shows the scaled Z-domain transfer function of the sinc filter.
½H(z)½ = ^{1 - Z- N 3}
1 - Z^{- 1}
(8)
The frequency domain transfer function of the sinc filter is shown in Equation 9.
3
½H(f)½ =
sin ^Npf
f_MOD
N ´ sin ^pf
f_MOD
where:
N = decimation ratio
(9)
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