LMH6586_14 Datasheet, PDF (21/34 Pages) Texas Instruments – 32x16 Video Crosspoint Switch

LMH6586
www.ti.com
SNCS105D – JULY 2008 – REVISED MARCH 2013
Typically the clamp voltage is set to 300 mV. During the sync pulse period, the clamp circuit amplifier sources
current and the coupling capacitor will not discharge. However, during the active video period, the clamp
amplifier will sink current and cause the coupling capacitor to discharge through the 75Ω resistor. To limit this
discharge to an acceptable value we must choose an appropriate value of the AC coupling capacitor. The value
of the AC coupling capacitor can be calculated as follows:
Cap Discharge Time T = Line Period – Sync Period
T = 63.5 µs – 4.7 µs
T= 58.8 µs
Discharge current I = 1.37 µA
Charge Q = I*T
Q = 1.37 µA * 58.8 µs
Q = 80.55 pC
Q = C*V
C = Q/V
Typical acceptable voltage drop V = 0.1% of 700 mV
V = 0.7 mV
Capacitor Value C = 80.55 pC/ 0.7 mV
C = 0.115 µF
Thus the suggested AC coupling capacitor value is 0.1 µF. A larger value will reduce line droop at the expense of
longer input settling time.
VIDEO INPUTS AND OUTPUTS
The LMH6586 has 32 inputs which accept standard NTSC or PAL composite video signals. The input video
signal should be AC coupled through a 0.1 µF coupling capacitor for proper operation. Each input is buffered
before the switch matrix, which provides high input impedance. Input buffering enables any single output to be
broadcasted to all 16 outputs at a time without loading of the input source. Each input buffer can be individually
shut down using the input shutdown registers. When shutdown the input buffers are high impedance, which
reduces power consumption and crosstalk.
The LMH6586 has 16 video outputs each of which is buffered through a programmable 1X or 2X gain output
buffer. The outputs are capable of driving 150Ω loads. When the output gain is set to 1X (GAIN_SEL = 0), the
output signal sync tip is set to the VREF_CLAMP voltage level; otherwise, when the gain is set to 2X (GAIN_SEL
= 1), the output signal sync tip is set to twice the VREF_CLAMP level. Each output can be individually shut down
using the output shutdown registers. When shutdown the outputs are high impedance, which reduces power
consumption and crosstalk, and also enables multiple outputs to be connected together for expanding the matrix
array size. Note that output short circuit protection is not provided, so care must be taken to ensure only one
output is active when output channels are tied together in expansion configurations.
INPUT EXPANSION
The LMH6586 has the capability for creating larger switching matrices. Depending on the number of input and
output channels required, the number of devices required can be calculated. To implement a 128 x 16 non-
blocking matrix arrange the building blocks in a grid. The inputs are connected in parallel while the outputs are
wired-or together. When using this configuration care must be taken to ensure that only one of the four outputs is
active. The other three outputs should be placed in shutdown mode by using the appropriate shutdown bit in the
output shutdown registers. This reduces output loading and the risk of output short circuit conditions, which can
lead to device overheating and even damage to the channel or device.
The figure below shows the 128 input x 16 output switching matrix using four LMH6586 devices. To construct
larger matrices use the same technique with more devices.
Because the LMH6586 has 2-bit configurable slave address inputs, up to four LMH6586 devices can be
connected to a common I²C bus. For more devices additional I²C buses may be required.
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