LMH6586_14 Datasheet, PDF (19/34 Pages) Texas Instruments – 32x16 Video Crosspoint Switch

LMH6586
www.ti.com
SNCS105D – JULY 2008 – REVISED MARCH 2013
The following example illustrates a practical use of video detection in a real-world system. A bank's ATM
surveillance system could consist of a video camera, a LMH6586 crosspoint switch, a video recorder, and control
system. When no one is using the ATM, the area being monitored by the camera could have strong backlighting,
so the camera would output a normally high video level. When a person approaches the area, most of the
backlighting would be blocked by the person and cause a measurable decrease in the video level. This change
in camera's video level could be detected by the LMH6586, which could then flag the security system to begin
recording of the activity. Once the person leaves the area, the LMH6586 could clear the flag.
SYNC DETECTION
The LMH6586 also features a sync detection circuit that can indicate when an input's negative-going sync pulse
is not detected below the threshold level (“loss of sync”). The sync threshold voltage level is common to all 32
input channels and is defined by the bias voltage on the VREF_SYNC input (pin 65), which may be set using a
simple voltage divider circuit. The recommended voltage level at the VREF_SYNC pin is 350 mV to ensure
proper operation.
Registers 0x00 to 0x03 (read-only) contain the sync detection status bits for all 32 input channels. Any input (m)
has a sync detection status bit (SD_m) that can flag high when a loss of sync is detected; otherwise, the status
bit will be low to indicate presence of sync.
DETECTION FLAG OUTPUT
The FLAG output (pin 75) can flag high if either video detection or sync detection is triggered based on the user-
defined enable settings for the video and sync detection status bits. Any of the input's video detection status bits
(VD_m) and sync detection status bits (SD_m) can be logically OR-ed into this single FLAG output pin. Registers
0x10 to 0x13 contain the video detection enable bits and registers 0x14 to 0x17 contain the sync detection
enable bits for all input channels. Any input (m) has both a video detection enable bit (VD_EN_m) and a sync
detection enable bit (SD_EN_m). When any enable bit is set low, the respective status bit will be excluded from
the OR-ing function used to set the FLAG output; otherwise, when the enable bit is set high, the respective status
bit will be included in the FLAG output function. Therefore, the FLAG will only logical-OR the status bits of the
channel(s) and type(s) of detection that are specifically enabled by the user.
SWITCH MATRIX
The LMH6586 uses 512 CMOS analog switches to form a 32 x 16 crosspoint switch. The LMH6586 is a non-
blocking crosspoint switch which means that any one of the 32 inputs can be routed to any of the 16 outputs.
The switch can only be configured by programming through the I²C bus interface.
DC RESTORATION
Because the LMH6586 uses a single 5V supply and typical composite video signals contain signal components
both above and below 0V (video blanking level), proper input signal biasing is required to ensure the video signal
is within the operating range of the amplifier. To simplify the external biasing circuitry, each input of the LMH6586
has a dedicated DC restore clamp circuit to allow AC-coupled input operation using a 0.1 uF coupling capacitor.
Please refer to AC COUPLING for details on how the coupling capacitor value was determined.
AC COUPLING
Each video input uses an integrated DC restore clamp circuit to servo the sync tip of the AC-coupled video input
signal to the DC voltage received at the VREF_CLAMP input (pin 66). For proper AC-coupled operation, the
LMH6586 requires video signals with negative sync pulses. The VREF_CLAMP level can be set in range of 300
mV to 1.0V using a voltage divider network. For optimum performance and reduced power consumption, it is
recommended to set VREF_CLAMP to 300 mV. Therefore, assuming a video input amplitude of 1V_PP, the bottom
of the sync tip level would be clamped to 300 mV above ground and the peak white video level would be at 1.3V.
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