66AK2G02_16 Datasheet, PDF (204/230 Pages) Texas Instruments – Multicore DSP+ARM KeyStone II System-on-Chip (SoC)

66AK2G02, 66AK2G01
SPRS932C – DECEMBER 2015 – REVISED NOVEMBER 2016
32-bit DDR3 EMIF
DDR3_D31
8
DDR3_D24
DDR3_DQM3
DDR3_DQS3_P
DDR3_DQS3_N
DDR3_D23
8
DDR3_D16
DDR3_DQM2
DDR3_DQS2_P
DDR3_DQS2_N
DDR3_D15
8
DDR3_D8
DDR3_DQM1
DDR3_DQS1_P
DDR3_DQS1_N
DDR3_D7
8
DDR3_D00
DDR3_DQM0
DDR3_DQS0_P
DDR3_DQS0_N
DDR3_CLKOUT_P*
DDR3_CLKOUT_N*
DDR3_ODT0
DDR3_CEn0
DDR3_BA0
DDR3_BA1
DDR3_BA2
DDR3_A00
16
DDR3_A15
DDR3_CASn
DDR3_RASn
DDR3_WEn
DDR3_CKE0/1
DDR3_RESETn
DDR3_VREFSSTL
0.1 µF
8-Bit DDR3
Devices
DQ7
DQ7
DQ0
DM/TQS
NC TDQS
DQS
DQS
DQ0
DM/TQS
NC TDQS
DQS
DQS
CK
CK
ODT
CS
BA0
BA1
BA2
A0
CK
CK
ODT
CS
BA0
BA1
BA2
A0
A15
CAS
RAS
WE
CKE
RST
ZQ
ZQ
VREFDQ
VREFCA
0.1 µF
A15
CAS
RAS
WE
CKE
RST
ZQ
VREFDQ
ZQ
VREFCA
0.1 µF
8-Bit DDR3
Devices
DQ7
DQ7
DQ0
DM/TQS
NC TDQS
DQS
DQS
DQ0
DM/TQS
NC TDQS
DQS
DQS
CK
CK
ODT
CS
BA0
BA1
BA2
A0
A15
CAS
RAS
WE
CKE
RST
ZQ
ZQ _VREFDQ
VREFCA
0.1 µF
CK
CK
ODT
CS
BA0
BA1
BA2
A0
A15
CAS
RAS
WE
CKE
RST
ZQ
VREFDQ
VREFCA
0.1 µF
www.ti.com
Zo ^{0.1 µF}
DVDD_DDR
Zo
DDR_VTT
Zo
Zo
DDR_VREF
ZQ
Zo
Termination is required. See terminator comments.
ZQ
Value determined according to the DDR memory device data sheet.
Figure 7-3. 32-Bit, One-Bank DDR3L Interface Schematic Using Four 8-Bit DDR3L Devices
204 Applications, Implementation, and Layout
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