DS99R421_15 Datasheet, PDF (2/26 Pages) Texas Instruments – 5-43 MHz FPD-Link LVDS (3 Data + 1 Clock) to FPD-Link II LVDS (Embedded Clock DC Balanced) Converter

DS99R421
SNLS264D – JUNE 2007 – REVISED APRIL 2013
Block Diagram
VODSEL
PRE
DEN
3
OS[2:0]
RxIN0-
RxIN0+
RxIN1-
RxIN1+
RxIN2-
RxIN2+
RxCLKIN-
RxCLKIN+
PWDNB
100:
100:
100:
21 Bits
Parallel
Data
100:
PLL
DS99R421
Standard 4 LVDS - to - 1 LVDS Tx ± Converter
Figure 1. Block Diagram
DOUT+
DOUT-
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Application Overview
3
OS[2:0]
LVDS
DATA0 ^100:
LVDS
DATA1
100:
LVDS
DATA2 ^100:
DOUT+
RIN+
DOUT- STP RIN-
(Up to 10 meters)
LVDS
CLK
100:
100:
Differential
PCB Traces
DS99R421
Figure 2. Typical Application Diagram
Rx - DESERIALIZER
2
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