TM4C1230E6PM Datasheet, PDF (199/1103 Pages) Texas Instruments – Tiva™ TM4C1230E6PM Microcontroller

Tiva^™ TM4C1230E6PM Microcontroller
5.2.2
5.2.2.1
information about the capabilities of the on-chip peripherals are provided at offset 0xFC0 in each
peripheral's register space in the Peripheral Properties registers, such as the GPTM Peripheral
Properties (GPTMPP) register. Previous devices used the Device Capabilities (DC0-DC9) registers
for information about the peripherals and their capabilities. These registers are present on this device
for backward software capability, but provide no information about peripherals that were not available
on older devices.
Reset Control
This section discusses aspects of hardware functions during reset as well as system software
requirements following the reset sequence.
Reset Sources
The TM4C1230E6PM microcontroller has six sources of reset:
1. Power-on reset (POR) (see page 200).
2. External reset input pin (RST) assertion (see page 201).
3. A brown-out detection that can be caused by any of the following events: (see page 202).
■ V _DD under BOR0. The trigger value is the highest V_DD voltage level for BOR0.
■ V_DD under BOR1. The trigger value is the highest V_DD voltage level for BOR1.
4. Software-initiated reset (with the software reset registers) (see page 203).
5. A watchdog timer reset condition violation (see page 203).
6. MOSC failure (see page 204).
Table 5-2 provides a summary of results of the various reset operations.
Table 5-2. Reset Sources
Reset Source
Core Reset?
JTAG Reset?
On-Chip Peripherals Reset?
Power-On Reset
Yes
Yes
Yes
RST
Yes
Pin Config Only
Yes
Brown-Out Reset
Yes
Pin Config Only
Yes
Software System Request
Yes
Pin Config Only
Yes
Reset using the SYSRESREQ
bit in the APINT register.
Software System Request
Yes
Reset using the VECTRESET
bit in the APINT register.
Software Peripheral Reset
No
Pin Config Only
Pin Config Only
No
Yes^a
Watchdog Reset
Yes
Pin Config Only
Yes
MOSC Failure Reset
Yes
Pin Config Only
Yes
a. Programmable on a module-by-module basis using the Software Reset Control Registers.
After a reset, the Reset Cause (RESC) register is set with the reset cause. The bits in this register
are sticky and maintain their state across multiple reset sequences, except when an internal POR
June 12, 2014
199
Texas Instruments-Production Data