TM4C129XNCZAD Datasheet, PDF (1874/2191 Pages) Texas Instruments – Tiva Microcontroller

LCD Controller
Register 5: LIDD CS0 Read/Write Address (LIDDCS0ADDR), offset 0x014
This register contains the read and write address of the current access enabled by CS0 (LCDAC).
LIDD CS0 Read/Write Address (LIDDCS0ADDR)
Base 0x4405.0000
Offset 0x014
Type RW, reset 0x0000.0000
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
reserved
Type RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
CS0ADDR
Type RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Bit/Field
31:16
15:0
Name
reserved
CS0ADDR
Type
RO
RW
Reset
0x0000
0x0000
Description
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
LCD Address
The LCD Controller supports a shared Address/Data output bus. A write
to this register initiates a bus write transaction. A read from this register
initiates a bus read transaction.
CPU reads and writes to this register are not permitted if the LIDD
module is in DMA mode (DMAEN bit set in the LIDDCTRL register). If
the LIDD is being used as a generic bus interface, writing to this register
can store CS0ADDR to an external transparent latch holding a 16-bit
address.
If the LIDD is being used to interface with a character based LCD panel
in Hitachi configuration mode, reading and writing to this register can
be used to access the command instruction area of the panel.
1874
Texas Instruments-Production Data
June 18, 2014