TM4C129XNCZAD Datasheet, PDF (1512/2191 Pages) Texas Instruments – Tiva Microcontroller

1-Wire Master Module
22.2
Signal Description
The following table lists the external signals of the 1-Wire module and describes the function of
each. The 1-Wire module signals are alternate functions for GPIO signals and default to be GPIO
signals at reset. The column in the table below titled "Pin Mux/Pin Assignment" lists the GPIO pin
placements for the 1-Wire signals. The AFSEL bit in the GPIO Alternate Function Select
(GPIOAFSEL) register (page 806) should be set to choose the 1-Wire function. The number in
parentheses is the encoding that must be programmed into the PMCn field in the GPIO Port Control
(GPIOCTL) register to assign the 1-Wire signal to the specified GPIO port pin. For more information
on configuring GPIOs, see “General-Purpose Input/Outputs (GPIOs)” on page 775.
Table 22-1. 1-Wire Signals (212BGA)
Pin Name
OWALT
OWIRE
Pin Number Pin Mux / Pin
Assignment
K15
PG5 (5)
B12
PP5 (4)
G2
PE3 (5)
K17
PG4 (5)
V12
PG6 (5)
U14
PG7 (5)
D8
PP4 (4)
A8
PP7 (5)
Pin Type
I/O
I/O
Buffer Type Description
TTL
1-Wire Optional 2nd signal to be used as output.
TTL
1-Wire Single Bus Pin. This signal is input only if
1-Wire Alternate Output is enabled.
22.3
22.3.1
Functional Description
1-Wire is a simple single-wire communication interface comprising a wire protocol, transport protocol,
and base session protocols (as well as some basic commands). The wire protocol generates 0s
and 1s by varying the time the line is held low (it is pulled up by a resistor). The TM4C129XNCZAD
microcontroller is the master and controls the line at all times. A pull-up keeps the line parked high
and the microcontroller driver is assumed to be normal open-drain. No special GPIO configuration
is needed here since the open-drain support is taken care of outside of the microcontroller. See
Table 10-4 on page 789 for pin configuration information. Data can be both read and written on the
same 1-Wire pin. The 1-Wire module supports the most basic aspects of the protocol, including wire
protocol, byte transport control and line reset. Software is expected to handle the session protocol,
including selection of a slave (when more than one is on the same line) and higher level commands.
Note: All time values by the 1-Wire Master are stated in μs, but the actual time on the wire may
be less by 62.5 ns.
1-Wire Protocol
The 1-Wire protocol signals 1s and 0s by holding the line low for varying lengths of time as described
below. For details on the operation of this device, see “Overdrive” on page 1516 Before a command
is sent, a reset is issued on the line. This is a two-part operation:
■ The 1-Wire Master module drives and holds line low for >480 µs.
■ The controller waits for an answer-to-reset from one or more slaves. A slave signals a reset by
pulling the line low for 60 µs to 240 µs. If the line is not sampled low, there is no slave on the
bus and the NOATR bit is set in the 1-Wire Control and Status (ONEWIRECS) register. An
interrupt mask can also be set to trigger an interrupt on this condition. If the line is sampled low,
it indicates there are one or more slaves on the 1-Wire bus. The Master samples the line some
period after releasing the line, taking into consideration the time needed for the slave to respond.
The time from reset release to first sample is programmed through the ATRSAM bit in the 1-Wire
1512
Texas Instruments-Production Data
June 18, 2014