SM74203 Datasheet, PDF (18/24 Pages) Texas Instruments – SM74203 60V Low Side Controller for Boost and SEPIC

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FIGURE 9. Error Amplifier Gain and Phase
12. Plot or evaluate the complete control loop transfer
function: The complete control loop transfer function is ob-
tained by multiplying the power stage and error amplifier
functions together. The bandwidth and phase margin can
then be read graphically or evaluated numerically.
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FIGURE 10. Overall Loop Gain and Phase
The bandwidth of this example circuit at V_IN = 16V is 10.5 kHz,
with a phase margin of 66°.
13. Re-evaluate at the corners of input voltage and output
current: Boost converters exhibit significant change in their
loop response when V_IN and I_O change. With the compensa-
tion fixed, the total control loop gain and phase should be
checked to ensure a minimum phase margin of 45° over both
line and load.
Efficiency Calculations
A reasonable estimation for the efficiency of a boost regulator
controlled by the SM74203 can be obtained by adding to-
gether the loss is each current carrying element and using the
equation:
The following shows an efficiency calculation to complement
the circuit design from the Design Considerations section.
Output power for this circuit is 40V x 0.5A = 20W. Input voltage
is assumed to be 13.8V, and the calculations used assume
that the converter runs in CCM. Duty cycle for V_IN = 13.8V is
66%, and the average inductor current is 1.5A.
CHIP OPERATING LOSS
This term accounts for the current drawn at the VIN pin. This
current, I_IN, drives the logic circuitry and the power MOSFETs.
The gate driving loss term from the power MOSFET section
of Design Considerations is included in the chip operating
loss. For the SM74203, I_IN is equal to the steady state oper-
ating current, I_CC, plus the MOSFET driving current, I_GC.
Power is lost as this current passes through the internal linear
regulator of the SM74203.
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I_GC = Q_G X f_SW
I_GC = 27 nC x 500 kHz = 13.5 mA
I_CC is typically 3.5 mA, taken from the Electrical Characteris-
tics table. Chip Operating Loss is then:
P_Q = V_IN X (I_Q + I_GC)
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