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SM74203 Datasheet, PDF (12/24 Pages) Texas Instruments – SM74203 60V Low Side Controller for Boost and SEPIC
The factor 1.3 accounts for the increase in MOSFET on re-
sistance due to heating. Alternatively, the factor of 1.3 can be
ignored and the maximum on resistance of the MOSFET can
be used.
Gate charging loss, PG, results from the current required to
charge and discharge the gate capacitance of the power
MOSFET and is approximated as:
PG = VCC x QG x fSW
QG is the total gate charge of the MOSFET. Gate charge loss
differs from conduction and switching losses because the ac-
tual dissipation occurs in the SM74203 and not in the MOS-
FET itself. If no external bias is applied to the VCC pin,
additional loss in the SM74203 IC occurs as the MOSFET
driving current flows through the VCC regulator. This loss,
PVCC, is estimated as:
PVCC = (VIN – VCC) x QG x fSW
Switching loss, PSW, occurs during the brief transition period
as the MOSFET turns on and off. During the transition period
both current and voltage are present in the channel of the
MOSFET. The loss can be approximated as:
PSW = 0.5 x VIN x [IO / (1 – D)] x (tR + tF) x fSW
Where tR and tF are the rise and fall times of the MOSFET
For this example, the maximum drain-to-source voltage ap-
plied across the MOSFET is VO plus the ringing due to para-
sitic inductance and capacitance. The maximum drive voltage
at the gate of the high side MOSFET is VCC, or 7V typical.
The MOSFET selected must be able to withstand 40V plus
any ringing from drain to source, and be able to handle at least
7V plus ringing from gate to source. A minimum voltage rating
of 50VD-S and 10VG-S MOSFET will be used. Comparing the
losses in a spreadsheet leads to a 60VD-S rated MOSFET in
SO-8 with an RDSON of 22 mΩ (the maximum vallue is 31
mΩ), a gate charge of 27 nC, and rise and falls times of 10 ns
and 12 ns, respectively.
OUTPUT DIODE
The boost regulator requires an output diode D1 (see Figure
1) to carrying the inductor current during the MOSFET off-
time. The most efficient choice for D1 is a Schottky diode due
to low forward drop and near-zero reverse recovery time. D1
must be rated to handle the maximum output voltage plus any
switching node ringing when the MOSFET is on. In practice,
all switching converters have some ringing at the switching
node due to the diode parasitic capacitance and the lead in-
ductance. D1 must also be rated to handle the average output
current, IO.
The overall converter efficiency becomes more dependent on
the selection of D1 at low duty cycles, where the boost diode
carries the load current for an increasing percentage of the
time. This power dissipation can be calculating by checking
the typical diode forward voltage, VD, from the I-V curve on
the diode's datasheet and then multiplying it by IO. Diode
datasheets will also provide a typical junction-to-ambient ther-
mal resistance, θJA, which can be used to estimate the oper-
ating die temperature of the Schottky. Multiplying the power
dissipation (PD = IO x VD) by θJA gives the temperature rise.
The diode case size can then be selected to maintain the
Schottky diode temperature below the operational maximum.
In this example a Schottky diode rated to 60V and 1A will be
suitable, as the maximum diode current will be 0.5A. A small
case such as SOD-123 can be used if a small footprint is crit-
ical. Larger case sizes generally have lower θJA and lower
forward voltage drop, so for better efficiency the larger SMA
case size will be used.
BOOST INDUCTOR
The first criterion for selecting an inductor is the inductance
itself. In fixed-frequency boost converters this value is based
on the desired peak-to-peak ripple current, ΔiL, which flows in
the inductor along with the average inductor current, IL. For a
boost converter in CCM IL is greater than the average output
current, IO. The two currents are related by the following ex-
pression:
IL = IO / (1 – D)
As with switching frequency, the inductance used is a tradeoff
between size and cost. Larger inductance means lower input
ripple current, however because the inductor is connected to
the output during the off-time only there is a limit to the re-
duction in output ripple voltage. Lower inductance results in
smaller, less expensive magnetics. An inductance that gives
a ripple current of 30% to 50% of IL is a good starting point for
a CCM boost converter. Minimum inductance should be cal-
culated at the extremes of input voltage to find the operating
condition with the highest requirement:
By calculating in terms of amperes, volts, and megahertz, the
inductance value will come out in micro henries.
In order to ensure that the boost regulator operates in CCM
a second equation is needed, and must also be evaluated at
the corners of input voltage to find the minimum inductance
required:
By calculating in terms of volts, amps and megahertz the in-
ductance value will come out in µH.
For this design ΔiL will be set to 40% of the maximum IL. Duty
cycle is evaluated first at VIN(MIN) and at VIN(MAX). Second, the
average inductor current is evaluated at the two input volt-
ages. Third, the inductor ripple current is determined. Finally,
the inductance can be calculated, and a standard inductor
value selected that meets all the criteria.
Inductance for Minimum Input Voltage
DVIN(MIN) = (40 – 9.0 + 0.5) / (40 + 0.5) = 78%
IL-VIN(MIN) = 0.5 / (1 – 0.78) = 2.3A
ΔiL = 0.4 x 2.3A = 0.92A
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