TMS320DM6467T_17 Datasheet, PDF (177/352 Pages) Texas Instruments – Digital Media System-on-Chip

TMS320DM6467T
www.ti.com
SPRS605C – JULY 2009 – REVISED JUNE 2012
Table 7-16. DM6467T EDMA Registers (continued)
HEX ADDRESS RANGE
0x01C1 068C - 0x01C1 06FF
0x01C1 0700
0x01C1 0704
0x01C1 0708
0x01C1 070C
0x01C1 0710
0x01C1 0714
0x01C1 0718 - 0x01C1 073F
0x01C1 0740
0x01C1 0744
0x01C1 0748
0x01C1 074C
0x01C1 0750
0x01C1 0754
0x01C1 0758 - 0x01C1 077F
0x01C1 0780
0x01C1 0784
0x01C1 0788
0x01C1 078C
0x01C1 0790
0x01C1 0794
0x01C1 0798 - 0x01C1 07BF
0x01C1 07C0
0x01C1 07C4
0x01C1 07C8
0x01C1 07CC
0x01C1 07D0
0x01C1 07D4
0x01C1 07D8 - 0x01C1 07FF
0x01C1 0800
0x01C1 0804
0x01C1 0808 - 0x01C1 08FF
0x01C1 0900
0x01C1 0904 - 0x01C1 0913
0x01C1 0914 - 0x01C1 091F
0x01C1 0920
0x01C1 0924
0x01C1 0928
0x01C1 092C
0x01C1 0930
0x01C1 0934 - 0x01C1 093F
0x01C1 0940
0x01C1 0944 - 0x01C1 09FF
0x01C1 0A00 - 0x01C1 0A3F
0x01C1 0A40
0x01C1 0A44
ACRONYM
REGISTER NAME
–
Reserved
DFOPT0
EDMA3 TC1 Destination FIFO Options Register 0
DFSRC0
EDMA3 TC1 Destination FIFO Source Address Register 0
DFCNT0
EDMA3 TC1 Destination FIFO Count Register 0
DFDST0
EDMA3 TC1 Destination FIFO Destination Address Register 0
DFBIDX0
EDMA3 TC1 Destination FIFO B-Index Register 0
DFMPPRXY0
EDMA3 TC1 Destination FIFO Memory Protection Proxy Register 0
–
Reserved
DFOPT1
EDMA3 TC1 Destination FIFO Options Register 1
DFSRC1
EDMA3 TC1 Destination FIFO Source Address Register 1
DFCNT1
EDMA3 TC1 Destination FIFO Count Register 1
DFDST1
EDMA3 TC1 Destination FIFO Destination Address Register 1
DFBIDX1
EDMA3 TC1 Destination FIFO B-Index Register 1
DFMPPRXY1
EDMA3 TC1 Destination FIFO Memory Protection Proxy Register 1
–
Reserved
DFOPT2
EDMA3 TC1 Destination FIFO Options Register 2
DFSRC2
EDMA3 TC1 Destination FIFO Source Address Register 2
DFCNT2
EDMA3 TC1 Destination FIFO Count Register 2
DFDST2
EDMA3 TC1 Destination FIFO Destination Address Register 2
DFBIDX2
EDMA3 TC1 Destination FIFO B-Index Register 2
DFMPPRXY2
EDMA3 TC1 Destination FIFO Memory Protection Proxy Register 2
–
Reserved
DFOPT3
EDMA3 TC1 Destination FIFO Options Register 3
DFSRC3
EDMA3 TC1 Destination FIFO Source Address Register 3
DFCNT3
EDMA3 TC1 Destination FIFO Count Register 3
DFDST3
EDMA3 TC1 Destination FIFO Destination Address Register 3
DFBIDX3
EDMA3 TC1 Destination FIFO B-Index Register 3
DFMPPRXY3
EDMA3 TC1 Destination FIFO Memory Protection Proxy Register 3
–
Reserved
Transfer Controller 2 Registers
PID
Peripheral Identification Register
TCCFG
EDMA3 TC2 Configuration Register
–
Reserved
TCSTAT
EDMA3 TC2 Channel Status Register
–
Reserved
–
Reserved
ERRSTAT
EDMA3 TC2 Error Status Register
ERREN
EDMA3 TC2 Error Enable Register
ERRCLR
EDMA3 TC2 Error Clear Register
ERRDET
EDMA3 TC2 Error Details Register
ERRCMD
EDMA3 TC2 Error Interrupt Command Register
–
Reserved
RDRATE
EDMA3 TC2 Read Command Rate Register
–
Reserved
–
Reserved
SAOPT
EDMA3 TC2 Source Active Options Register
SASRC
EDMA3 TC2 Source Active Source Address Register
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Peripheral Information and Electrical Specifications 177
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