TMS320DM6467T_17 Datasheet, PDF (128/352 Pages) Texas Instruments – Digital Media System-on-Chip

TMS320DM6467T
SPRS605C – JULY 2009 – REVISED JUNE 2012
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31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
Reserved
R-0000 0000 0000 0000
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Reserved
INTARM0
R-0000 0000 0000 000
R-0
LEGEND: R = Read only, n = Value at reset
Figure 4-23. ARMINT Status Register [0x01C4 0070]
Table 4-42. ARMINT Status Register Bit Descriptions⁽¹⁾
BIT
NAME
31:1
Reserved
Reserved. A read returns 0.
0
INTARM0
DSP-to-ARM Int0 Status
DESCRIPTION
(1) Read only, writes have no effect.
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
Reserved
R-0000 0000 0000 0000
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Reserved
INTARM0
R-0000 0000 0000 000
R/W-0
LEGEND: R = Read, W = Write, n = Value at reset
Figure 4-24. ARMINTSET Register [0x01C4 0074]
Table 4-43. ARMINTSET Register Bit Descriptions
BIT
NAME
31:1
Reserved
Reserved. A read returns 0.
0
INTARM0
DSP-to-ARM Int0 Set⁽¹⁾
DESCRIPTION
(1) Writing a '1' generates the interrupt and sets the corresponding bit in the ARMINT status register. The register bit automatically clears to
a value of '0'. Writing a '0' has no effect. This register always reads as '0'.
128 Device Configurations
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