TLC5973 Datasheet, PDF (17/34 Pages) Texas Instruments – TLC5973 3-Channel, 12-Bit, PWM Constant-Current LED Driver with Single-Wire Interface (EasySet)

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TLC5973
SBVS225B – MARCH 2013 – REVISED MAY 2014
8.4.2.3 One Communication Cycle End of Sequence (EOS)
One communication cycle end of sequence (EOS) must be input after the 48-bit data are written because the
TLC5973 does not count the number of input data. When SDI is held low for the EOS hold time (t_H0), the 48-bit
shift register values are locked and a buffered SDI signal is output from SDO to transfer GS data to the next
device. Figure 16 shows the EOS timing.
The first SDI rising edge of the last input data.
SDI
48-Bit Shift
Register
(Internal)
3.5 x t_CYCLE (min) to 5.5 x t_CYCLE (max)
Shift register data are locked.
GSLATignal
(Internal)
GS data latch signal is not generated.
36-Bit GS
Data Latch
(Internal)
OUTEN Signal Low = pulse signal not
(Internal) output from SDO.
GS data are not changed.
High = pulse signal output from SDO.
SDO
Figure 16. End of Sequence (EOS)
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