TLC5973 Datasheet, PDF (16/34 Pages) Texas Instruments – TLC5973 3-Channel, 12-Bit, PWM Constant-Current LED Driver with Single-Wire Interface (EasySet)

TLC5973
SBVS225B – MARCH 2013 – REVISED MAY 2014
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8.4.2 One-Wire Interface (EasySet) Data Writing Method
There are four sequences to write GS data into the TLC5973 via a single-wire interface. This section discusses
each sequence in detail.
8.4.2.1 Data Transfer Rate (t_CYCLE) Measurement Sequence
The TLC5973 measures the time between the first and second SDI rising edges either after the device is
powered up or when the GS data latch sequence is executed (as described in the GS Data Latch Sequence
(GSLAT) section) and the time is internally stored as t_CYCLE. t_CYCLE serves as a base time used to recognize one
complete data write operation, a 48-bit data write operation, and a GS data write operation to the GS data latch.
t_CYCLE can be set between 0.33 µs and 10 µs (f_CLK(SDI) = 100 kHz to 3000 kHz). In this sequence, two instances
of data ‘0’ are written to the LSB side of the 48-bit shift register. Figure 14 shows the t_CYCLE measurement timing.
1st SDI
Rising Edge
2nd SDI
Rising Edge
SDI
t_CYCLE
Figure 14. Data Transfer Rate (t_CYCLE) Measurement
8.4.2.2 Data ‘0’ and Data ‘1’ Write Sequence (Data Write Sequence)
When the second SDI rising edge is not input before 0.9 × t_CYCLE elapses from the first SDI rising edge input, the
data are recognized as '0'. When the second SDI rising edge is input before 50% of t_CYCLE elapses from the first
SDI rising edge input, the data are recognized as '1'. This write sequence must be repeated 46 times after the
t_CYCLE measurement sequence in order to send the write command to the higher 10-bit (3AAh) and 36-bit GS
data. Figure 15 shows the data ‘0’ and ‘1’ write timing.
Data 0 Writing
First SDI
Rising Edge
SDI
Data 1 Writing
First SDI
Rising Edge
Second SDI
Rising Edge
Dotted line waveform
is accepted.
t_SDI = 0.9 x t_CYCLE
When the second SDI
rising edge is not input, it
is recognized as ‘0’.
This time must be between t_CYCLE x 0.9 and t_CYCLE x 2.0
t_SDI = 0.5 x t_CYCLE
When the second SDI
rising edge is input by
0.5 x t_CYCLE, it
is recognized as ‘1’.
Figure 15. Data ‘0’ and ‘1’ Write Operation
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