TLC34058 Datasheet, PDF (17/26 Pages) Texas Instruments – 256 × 24 COLOR PALETTE

TLC34058
256 × 24 COLOR PALETTE
SLAS050 – D3961, NOVEMBER 1991
PRINCIPLES OF OPERATION
Table 5. Input Pixel Data versus Color Selection
COMMAND
REGISTER
BIT
CR6
H
H
•
•
•
H
L
X
X
X
X = irrelevant
OVERLAY
SELECT
INPUT
OL1 OL0
L
L
L
L
•
•
•
•
•
•
L
L
L
L
L
H
H
L
H
H
COLOR
ADDRESS
(HEX)
P7 – P0
00
01
•
•
•
FF
XX
XX
XX
XX
COLOR
INFORMATION
color palette entry 00
color palette entry 01
•
•
•
•
•
•
•
•
•
•
•
•
color palette entry FF
overlay register 0
overlay register 1
overlay register 2
overlay register 3
video generation
The TLC34058 presents 8 bits of red, green, and blue information from either the palette RAM or overlay
registers to the three 8-bit DACs during every clock cycle. The DAC outputs produce currents that correlate to
their respective color input data. These output currents are translated to voltage levels that drive the color CRT
monitor. The SYNC and BLK signals adjust the DAC analog output currents to generate specific output levels
that are required in video applications. Table 6 shows the effect of SYNC and BLK upon the DAC output currents.
Figure 3 presents the overall composite video output waveforms. Note that only the green output (IOG) contains
sync information.
The DAC architecture ensures monotonicity and reduced switching transients by using identical current sources
and routing their outputs to the DAC current output or GND. Utilizing identical current sources eliminates the
need for precision component ratios within the DAC ladder circuitry. An on-chip operational amplifier stabilizes
the DAC full-scale output current over temperature and power supply variations.
Table 6. Effects of Sync and Blank Upon DAC Output Currents (see Note 7)
DESCRIPTION
IOG
(mA)
IOR, IOB
(mA)
SYNC
BLK
DAC
INPUTS
WHITE
26.67
19.05
H
DATA
data + 9.05
data + 1.44
H
DATA w/o SYNC
data + 1.44
data + 1.44
L
BLACK
9.05
1.44
H
BLACK w/o SYNC
1.44
1.44
L
BLACK
7.62
0
H
SYNC
0
0
L
H
FF
H
data
H
data
H
00
H
00
L
xx
L
xx
NOTE 7: The data in this table was measured with full-scale IOG current = 26.67 mA, Rset = 523 Ω, Vref = 1.235 V.
command register
The MPU can write to or read from the command register at any time. The command register is not initialized.
CR0 corresponds to the D0 data bus line. Refer to Table 7 for quick reference.
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