DS90LV047A_16 Datasheet, PDF (17/25 Pages) Texas Instruments – 3-V LVDS Quad CMOS Differential Line Driver

www.ti.com
DS90LV047A
SNLS044D – MAY 2000 – REVISED JULY 2016
Layout Guidelines (continued)
Surface mount 1% to 2% resistors are best. PCB stubs, component lead, and the distance from the termination
to the receiver inputs must be minimized. The distance between the termination resistor and the receiver should
be < 10 mm (12 mm maximum).
11.2 Layout Example
LVCMOS
Inputs
Decoupling Cap
DS90LV047A
DS90LV048A
1 EN
DOUT1- 16
1 R_IN1-
EN 16
2 D_IN1
DOUT1+ 15
2 R_IN1+
ROUT1 15
3 DIN2
DOUT2+ 14
3 R_IN2+
ROUT2 14
4 V_CC
5 GND
DOUT2- 13
DOUT3- 12
4 RIN2-
5 R_IN3-
VCC 13
GND 12
6 D_IN3
DOUT3+ 11
6 RIN3+
ROUT3 11
7 D_IN4
DOUT4+ 10
7 R_IN4+
ROUT4 10
8 EN*
DOUT4-
9
8 R_IN4-
EN* 9
Input Termination
(Required)
Figure 25. Layout Recommendation
Series Termination (optional)
Decoupling Cap
LVCMOS
Outputs
Series Termination (optional)
Copyright © 2000–2016, Texas Instruments Incorporated
Product Folder Links: DS90LV047A
Submit Documentation Feedback
17