DS90LV047A_16 Datasheet, PDF (12/25 Pages) Texas Instruments – 3-V LVDS Quad CMOS Differential Line Driver

DS90LV047A
SNLS044D – MAY 2000 – REVISED JULY 2016
8.2 Functional Block Diagram
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8.3 Feature Description
8.3.1 LVDS Fail-Safe
This section addresses the common concern of fail-safe biasing of LVDS interconnects, specifically looking at the
DS90LV047A driver outputs and the DS90LV048A receiver inputs.
The LVDS receiver is a high-gain, high-speed device that amplifies a small differential signal (20 mV) to CMOS
logic levels. Due to the high gain and tight threshold of the receiver, take care to prevent noise from appearing as
a valid signal.
The internal fail-safe circuitry of the receiver is designed to source or sink a small amount of current, providing
fail-safe protection (a stable known state of HIGH output voltage) for floating, terminated, or shorted receiver
inputs.
1. Open Input Pins. The DS90LV048A is a quad receiver device, and if an application requires only 1, 2, or 3
receivers, the unused channel(s) inputs must be left OPEN. Do not tie unused receiver inputs to ground or
any other voltages. The input is biased by internal high value pullup and pulldown resistors to set the output
to a HIGH state. This internal circuitry ensures a HIGH, stable output state for open inputs.
2. Terminated Input. If the DS90LV047A driver is disconnected (cable unplugged), or if the DS90LV047A
driver is in a TRI-STATE or power-off condition, the receiver output is again in a HIGH state, even with the
end of cable 100-Ω termination resistor across the input pins. The unplugged cable can become a floating
antenna which can pick up noise. If the cable picks up more than 10 mV of differential noise, the receiver
may see the noise as a valid signal and switch. To insure that any noise is seen as common-mode and not
differential, a balanced interconnect must be used. Twisted pair cable offers better balance than flat ribbon
cable.
3. Shorted Inputs. If a fault condition occurs that shorts the receiver inputs together, thus resulting in a 0-V
differential input voltage, the receiver output remains in a HIGH state. Shorted input fail-safe is not supported
across the common-mode range of the device (GND to 2.4 V). It is only supported with inputs shorted and no
external common-mode voltage applied.
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