DS90LV047A_16 Datasheet, PDF (14/25 Pages) Texas Instruments – 3-V LVDS Quad CMOS Differential Line Driver

DS90LV047A
SNLS044D – MAY 2000 – REVISED JULY 2016
9 Application and Implementation
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NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
9.1 Application Information
The DS90LV047A has a flow-through pinout that allows for easy PCB layout. The LVDS signals on one side of
the device easily allows for matching electrical lengths of the differential pair trace lines between the driver and
the receiver as well as allowing the trace lines to be close together to couple noise as common-mode. Noise
isolation is achieved with the LVDS signals on one side of the device and the TTL signals on the other side.
9.2 Typical Application
Figure 23. Point-to-Point Application
9.2.1 Design Requirements
When using LVDS devices, it is important to remember to specify controlled impedance PCB traces, cable
assemblies, and connectors. All components of the transmission media should have a matched differential
impedance of about 100 Ω. They should not introduce major impedance discontinuities.
Balanced cables (for example, twisted pair) are usually better than unbalanced cables (ribbon cable) for noise
reduction and signal quality. Balanced cables tend to generate less EMI due to field canceling effects and also
tend to pick up electromagnetic radiation as common-mode (not differential mode) noise which is rejected by the
LVDS receiver.
For cable distances < 0.5 M, most cables can be made to work effectively. For distances 0.5 M ≤ d ≤ 10 M,
CAT5 (Category 5) twisted pair cable works well, is readily available and relatively inexpensive.
9.2.2 Detailed Design Procedure
9.2.2.1 Probing LVDS Transmission Lines
Always use high impedance (> 100 kΩ), low capacitance (< 2 pF) scope probes with a wide bandwidth (1 GHz)
scope. Improper probing gives deceiving results.
9.2.2.2 Data Rate vs Cable Length Graph Test Procedure
A pseudo-random bit sequence (PRBS) of 2⁹−1 bits was programmed into a function generator (Tektronix
HFS9009) and connected to the driver inputs through 50-Ω cables and SMB connectors. An oscilloscope
(Tektronix 11801B) was used to probe the resulting eye pattern, measured differentially at the input to the
receiver. A 100-Ω resistor was used to terminate the pair at the far end of the cable. The measurements were
taken at the far end of the cable, at the input of the receiver, and used for the jitter analysis for this graph
(Figure 16). The frequency of the input signal was increased until the measured jitter (t_tcs) equaled 20% with
respect to the unit interval (t_tui) for the particular cable length under test. Twenty percent jitter is a reasonable
place to start with many system designs. The data used was NRZ. Jitter was measured at the 0-V differential
voltage of the differential eye pattern. The DS90LV047A and DS90LV048A can be evaluated using the new
DS90LV047-048AEVM.
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