SN74AUP1G126_17 Datasheet, PDF (15/40 Pages) Texas Instruments – Low-Power Single Bus Buffer Gate With 3-State Output

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Feature Description (continued)
8.3.3 Clamp Diodes
The inputs and outputs to this device have negative clamping diodes.
SN74AUP1G126
SCES596G – JULY 2004 – REVISED AUGUST 2017
CAUTION
Voltages beyond the values specified in the Absolute Maximum Ratings table can
cause damage to the device. The input negative-voltage and output voltage ratings
may be exceeded if the input and output clamp-current ratings are observed.
Device
VCC
Input
-IIK
Logic
Output
-IOK
GND
Figure 5. Electrical Placement of Clamping Diodes for Each Input and Output
8.3.4 Partial Power Down (I_off)
The inputs and outputs for this device enter a high-impedance state when the supply voltage is 0 V. The
maximum leakage into or out of any input or output pin on the device is specified by I_off in the Electrical
Characteristics.
8.3.5 Overvoltage Tolerant Inputs
Input signals to this device can be driven above the supply voltage so long as they remain below the maximum
input voltage value specified in the Absolute Maximum Ratings.
8.3.6 Output Enable
This device has an output enable (OE) pin that functions according to Table 1. When the outputs of the device
are disabled, they are placed into a high impedance state where it will neither source nor sink current. High-
impedance outputs are also commonly referred to as three-state or tri-state outputs. The maximum leakage for
the output in this state is defined by I_OZ in the Electrical Characteristics table.
8.4 Device Functional Modes
Table 1 lists the functional modes of the SN74AUP1G126 device.
Table 1. Function Table
INPUTS
OE
A
H
H
H
L
L
X
OUTPUT
Y
H
L
Z
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