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| DS90C3202_14 Datasheet, PDF (14/27 Pages) Texas Instruments – 3.3V 8 MHz to 135 MHz Dual FPD-Link Receiver | |||
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DS90C3202
SNLS191D â APRIL 2005 â REVISED APRIL 2013
AC Timing Diagrams (continued)
RCLK IN
(Differential)
RXOA+/-
VDIFF = 0V
Previous
cycle
Current
Cycle
VDIFF = 0V
OA1
OA0
Next
cycle
RXOB+/-
OB1
OB0
RXOC+/-
OC1
OC0
RXOD+/-
OD1
OD0
RXOE+/-
OE1
OE0
RXEA+/-
EA1
EA0
RXEB+/-
EB1
EB0
RXEC+/-
EC1
EC0
RXED+/-
ED1
ED0
RXEE+/-
RITOL 1 min
RITOL 1 max
RITOL 0 min
RITOL 0 max
RITOL 6 min
RITOL 6 max
RITOL 5 min
RITOL 5 max
RITOL 4 min
RITOL 4 max
RITOL 3 min
RITOL 3 max
RITOL 2 min
RITOL 2 max
EE1
EE0
Figure 18. Receiver RITOL Min and Max
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14
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