DS90CR483_15 Datasheet, PDF (12/27 Pages) Texas Instruments – 48-Bit LVDS Channel Link SER/DES - 33 - 112 MHz

DS90CR483, DS90CR484
SNLS047H – FEBRUARY 2000 – REVISED APRIL 2013
LVDS Interface
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Optional features supported: Pre-emphasis, and Deskew
Figure 15. 48 Parallel TTL Data Bits Mapped to LVDS Outputs with DC Balance Enabled
Optional feature supported: Pre-emphasis
Figure 16. 48 Parallel TTL Data Bits Mapped to LVDS Outputs with DC Balance Disabled
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