DS64EV400_15 Datasheet, PDF (11/22 Pages) Texas Instruments – Programmable Quad Equalizer

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DS64EV400
SNLS281H – AUGUST 2007 – REVISED APRIL 2013
Data Channel (0-3)
DC Offset Correction
IN_n ₊
IN_n -
Input
Termination
SDn SD
BST_0:BST_2
3
3
Equalizer
BST
CNTL
EN
V_DD
3
Limiting
Amplifier
EN
Boost Setting
SMBus Register
FEB
Figure 9. Simplified Block Diagram
OUT_n +
EN
V_DD
OUT_n ^-
ENn
Reg 03,04
bit 7, 3
Reg 07 SMBus
bit 0 Register
EQUALIZER BOOST CONTROL
Each data channel support eight programmable levels of equalization boost. The state of the FEB pin determines
how the boost settings are controlled. If the FEB pin is held High, then the equalizer boost setting is controlled by
the Boost Set pins (BST_[2:0]) in accordance with Table 2. If this programming method is chosen, then the boost
setting selected on the Boost Set pins is applied to all channels. When the FEB pin is held Low, the equalizer
boost level is controlled through the SMBus. This programming method is accessed via the appropriate SMBus
registers (see Table 1). Using this approach, equalizer boost settings can be programmed for each channel
individually. FEB is internally pulled High (default setting); therefore if left unconnected, the boost settings are
controlled by the Boost Set pins (BST_[0:2]). The eight levels of boost settings enables the DS64EV400 to
address a wide range of media loss and data rates.
6 mil Microstrip FR4
Trace Length (m)
0
5
10
15
20
25
30
40
Table 2. EQ Boost Control Table
24 AWG Twin-AX cable
length (m)
0
2
3
4
5
6
7
10
Channel Loss at 3.2 GHz
(dB)
0
5
7.5
10
12.5
15
17
22
Channel Loss at 5 GHz
(dB)
0
6
10
14
18
21
24
30
BST_N
[2, 1, 0]
000
001
010
011
1 0 0 (Default)
101
110
111
DEVICE STATE AND ENABLE CONTROL
The DS64EV400 has an enable feature on each data channel which provides the ability to control device power
consumption. This feature can be controlled either an Enable Pin (EN_n) with Reg 07 = 00'h (default value), or
by the Enable Control Bit register which can be configured through the SMBus port (see Table 1 and Table 3 for
detail register information), which require setting Reg 07 = 01'h and changing register value of Reg 03, 04. If the
Enable is activated using either the external EN_n pin or SMBUS register, the corresponding data channel is
placed in the ACTIVE state and all device blocks function as described. The DS64EV400 can also be placed in
STANDBY mode to save power. In the STANDBY mode only the control interface including the SMBus port, as
well as the signal detection circuit remain active.
Copyright © 2007–2013, Texas Instruments Incorporated
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