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DS64EV400_15 Datasheet, PDF (10/22 Pages) Texas Instruments – Programmable Quad Equalizer
DS64EV400
SNLS281H – AUGUST 2007 – REVISED APRIL 2013
www.ti.com
EN
OUT diff
1.5V
tOZED
1.5V
tZOED
VDD
0V
0V
Figure 6. Enable (EN) Delay Timing Diagram
VDD
10k
IN +
50
6k
VDD
EQ
50
10k
IN -
6k
Figure 7. Simplified Receiver Input Termination Circuit
tSU:CS
tLOW
tR
tBUF
tHD:STA
tHD:DAT
tHIGH
tF
tSU:DAT
tSU:STA
tSU:STO
SP
ST
ST
SP
Figure 8. SMBus Timing Parameters
CS
SDC
SDA
DS64EV400 FUNCTIONAL DESCRIPTIONS
The DS64EV400 is a programmable quad equalizer optimized for operation up to 10 Gbps for backplane and
cable applications.
DATA CHANNELS
The DS64EV400 provides four data channels. Each data channel consists of an equalizer stage, a limiting
amplifier, a DC offset correction block, and a CML driver as shown in Figure 9.
10
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