CC1310_16 Datasheet, PDF (11/54 Pages) Texas Instruments – SimpleLink Ultralow Power Sub-1-GHz Wireless MCU

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CC1310
SWRS181B – SEPTEMBER 2015 – REVISED OCTOBER 2015
Table 4-3. Signal Descriptions – RGZ Package (continued)
PIN
NAME
NO.
DIO_14
20
DIO_15
21
DIO_16
26
DIO_17
27
DIO_18
28
DIO_19
29
DIO_20
30
DIO_21
31
DIO_22
32
DIO_23
36
DIO_24
37
DIO_25
38
DIO_26
39
DIO_27
40
DIO_28
41
DIO_29
42
DIO_30
43
EGP
—
JTAG_TMSC
24
JTAG_TCKC
25
RESET_N
35
RF_N
2
RF_P
1
VDDR
45
VDDR_RF
48
VDDS
44
VDDS2
13
VDDS3
22
VDDS_DCDC
34
X24M_N
46
X24M_P
47
RX_TX
3
X32K_Q1
4
X32K_Q2
5
TYPE
DESCRIPTION
Digital I/O
Digital I/O
Digital I/O
Digital I/O
Digital I/O
Digital I/O
Digital I/O
Digital I/O
Digital I/O
Digital/Analog I/O
Digital/Analog I/O
Digital/Analog I/O
Digital/Analog I/O
Digital/Analog I/O
Digital/Analog I/O
Digital/Analog I/O
Digital/Analog I/O
Power
Digital I/O
Digital I/O
Digital input
RF I/O
RF I/O
Power
Power
Power
Power
Power
Power
Analog I/O
Analog I/O
RF I/O
Analog I/O
Analog I/O
GPIO
GPIO
GPIO, JTAG_TDO, High drive capability
GPIO, JTAG_TDI, High drive capability
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO, Sensor Controller, Analog
GPIO, Sensor Controller, Analog
GPIO, Sensor Controller, Analog
GPIO, Sensor Controller, Analog
GPIO, Sensor Controller, Analog
GPIO, Sensor Controller, Analog
GPIO, Sensor Controller, Analog
GPIO, Sensor Controller, Analog
Ground – Exposed Ground Pad
JTAG TMSC, High drive capability
JTAG TCKC
Reset, active-low. No internal pullup
Negative RF input signal to LNA during RX
Negative RF output signal to PA during TX
Positive RF input signal to LNA during RX
Positive RF output signal to PA during TX
1.7-V to 1.95-V supply, typically connect to output of internal DC-DC⁽³⁾⁽²⁾
1.7-V to 1.95-V supply, typically connect to output of internal DC-DC⁽⁴⁾⁽²⁾
1.8-V to 3.8-V main chip supply⁽¹⁾
1.8-V to 3.8-V DIO supply⁽¹⁾
1.8-V to 3.8-V DIO supply⁽¹⁾
1.8-V to 3.8-V DC-DC supply
24-MHz crystal oscillator pin 1
24-MHz crystal oscillator pin 2
Optional bias pin for the RF LNA
32-kHz crystal oscillator pin 1
32-kHz crystal oscillator pin 2
(3) If internal DC-DC is not used, this pin is supplied internally from the main LDO.
(4) If internal DC-DC is not used, this pin must be connected to VDDR for supply from the main LDO.
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Terminal Configuration and Functions
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