LM3S9B95-IQC80-C3 Datasheet, PDF (1053/1401 Pages) Texas Instruments – Stellaris® LM3S9B95 Microcontroller

NRND: Not recommended for new designs.
Stellaris^® LM3S9B95 Microcontroller
Bit/Field
2
1
0
Name
STALLED
TXRDY
RXRDY
Type
R/W
R/W
RO
Reset
0
0
0
Description
Endpoint Stalled
Value Description
0 A STALL handshake has not been transmitted.
1 A STALL handshake has been transmitted.
Software must clear this bit.
Transmit Packet Ready
Value Description
0 No transmit packet is ready.
1 Software sets this bit after loading an IN data packet into the
TX FIFO. The EP0 bit in the USBTXIS register is also set in this
situation.
This bit is cleared automatically when the data packet has been
transmitted.
Receive Packet Ready
Value Description
0 No data packet has been received.
1 A data packet has been received. The EP0 bit in the USBTXIS
register is also set in this situation.
This bit is cleared by writing a 1 to the RXRDYC bit.
October 05, 2012
Texas Instruments-Production Data
1053