LM3S5R31 Datasheet, PDF (1029/1275 Pages) Texas Instruments – Stellaris® LM3S5R31 Microcontroller

Stellaris^® LM3S5R31 Microcontroller
9. Set the pulse width of the PWM1 pin for a 75% duty cycle.
■ Write the PWM0CMPB register with a value of 0x0000.0063.
10. Start the timers in PWM generator 0.
■ Write the PWM0CTL register with a value of 0x0000.0001.
11. Enable PWM outputs.
■ Write the PWMENABLE register with a value of 0x0000.0003.
21.5
Register Map
Table 21-3 on page 1029 lists the PWM registers. The offset listed is a hexadecimal increment to the
register's address, relative to the PWM module's base address:
■ PWM0: 0x4002.8000
Note that the PWM module clock must be enabled before the registers can be programmed (see
page 268). There must be a delay of 3 system clocks after the PWM module clock is enabled before
any PWM module registers are accessed.
Table 21-3. PWM Register Map
Offset Name
Type
0x000 PWMCTL
0x004 PWMSYNC
0x008 PWMENABLE
0x00C PWMINVERT
0x010 PWMFAULT
0x014 PWMINTEN
0x018 PWMRIS
0x01C PWMISC
0x020 PWMSTATUS
0x024 PWMFAULTVAL
0x028 PWMENUPD
0x040 PWM0CTL
0x044 PWM0INTEN
0x048 PWM0RIS
0x04C PWM0ISC
0x050 PWM0LOAD
0x054 PWM0COUNT
0x058 PWM0CMPA
R/W
R/W
R/W
R/W
R/W
R/W
RO
R/W1C
RO
R/W
R/W
R/W
R/W
RO
R/W1C
R/W
RO
R/W
Reset
0x0000.0000
0x0000.0000
0x0000.0000
0x0000.0000
0x0000.0000
0x0000.0000
0x0000.0000
0x0000.0000
0x0000.0000
0x0000.0000
0x0000.0000
0x0000.0000
0x0000.0000
0x0000.0000
0x0000.0000
0x0000.0000
0x0000.0000
0x0000.0000
Description
PWM Master Control
PWM Time Base Sync
PWM Output Enable
PWM Output Inversion
PWM Output Fault
PWM Interrupt Enable
PWM Raw Interrupt Status
PWM Interrupt Status and Clear
PWM Status
PWM Fault Condition Value
PWM Enable Update
PWM0 Control
PWM0 Interrupt and Trigger Enable
PWM0 Raw Interrupt Status
PWM0 Interrupt Status and Clear
PWM0 Load
PWM0 Counter
PWM0 Compare A
See
page
1033
1035
1036
1038
1040
1042
1044
1047
1050
1052
1054
1058
1063
1066
1068
1070
1071
1072
January 20, 2012
Texas Instruments-Production Data
1029