TMS320F28075 Datasheet, PDF (1/182 Pages) Texas Instruments – Microcontrollers

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TMS320F28075
SPRS902B – OCTOBER 2014 – REVISED OCTOBER 2015
TMS320F2807x Piccolo™ Microcontrollers
1 Device Overview
1.1 Features
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• TMS320C28x 32-Bit CPU
– 120 MHz
– IEEE 754 Single-Precision Floating-Point Unit
(FPU)
– Trigonometric Math Unit (TMU)
• Programmable Control Law Accelerator (CLA)
– 120 MHz
– IEEE 754 Single-Precision Floating-Point
Instructions
– Executes Code Independently of Main CPU
• On-Chip Memory
– 512KB (256KW) of Flash (ECC-Protected)
– 100KB (50KW) of RAM (ECC-Protected or
Parity-Protected)
– Dual-Zone Security Supporting Third-Party
Development
• Clock and System Control
– Two Internal Zero-Pin 10-MHz Oscillators
– On-Chip Crystal Oscillator
– Windowed Watchdog Timer Module
– Missing Clock Detection Circuitry
• 1.2-V Core, 3.3-V I/O Design
• System Peripherals
– External Memory Interface (EMIF) With ASRAM
and SDRAM Support
– 6-Channel Direct Memory Access (DMA)
– Up to 97 Individually Programmable, Multiplexed
General-Purpose Input/Output (GPIO) Pins With
Input Filtering
– Peripheral Interrupt Controller (ePIE)
– Multiple Low-Power Mode (LPM) Support With
External Wakeup
• Communications Peripherals
– USB 2.0 (MAC + PHY)
– Two Controller Area Network (CAN) Modules
(Pin-Bootable)
– Three High-Speed (up to 30-MHz) SPI Ports
(Pin-Bootable)
– Two Multichannel Buffered Serial Ports
(McBSPs)
– Four Serial Communications Interfaces
(SCI/UART) (Pin-Bootable)
– Two I²C Interfaces (Pin-Bootable)
• Analog Subsystem
– Up to Three Analog-to-Digital Converters
(ADCs)
• 12-Bit Mode
– 3.1 MSPS Each (up to 9.3-MSPS System
Throughput)
– Single-Ended Inputs
– Up to 17 External Channels
• Single Sample-and-Hold (S/H) on Each ADC
• Hardware-Integrated Post-Processing of
ADC Conversions
– Saturating Offset Calibration
– Error From Setpoint Calculation
– High, Low, and Zero-Crossing Compare,
With Interrupt Capability
– Trigger-to-Sample Delay Capture
– Eight Windowed Comparators With 12-Bit
Digital-to-Analog Converter (DAC) References
– Three 12-Bit Buffered DAC Outputs
• Enhanced Control Peripherals
– 24 PWM Channels With Enhanced Features
– 16 High-Resolution Pulse Width Modulator
(HRPWM) Channels
• High Resolution on Both A and B Channels
of 8 PWM Modules
• Dead-Band Support (on Both Standard and
High Resolution)
– Six Enhanced Capture (eCAP) Modules
– Three Enhanced Quadrature Encoder Pulse
(eQEP) Modules
– Up to Eight Sigma-Delta Filter Module (SDFM)
Input Channels, 2 Parallel Filters per Channel
• Standard SDFM Data Filtering
• Comparator Filter for Fast Action for Out of
Range
• Package Options:
– 176-Pin PowerPAD™ Thermally Enhanced Low-
Profile Quad Flatpack (HLQFP) [PTP Suffix]
– 100-Pin PowerPAD Thermally Enhanced Thin
Quad Flatpack (HTQFP) [PZP Suffix]
• Temperature Options:
– T: –40ºC to 105ºC Junction
– S: –40ºC to 125ºC Junction
– Q: –40ºC to 125ºC Free-Air
(Q100 Qualification for Automotive Applications)
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An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.