TMS320C6671_15 Datasheet, PDF (90/238 Pages) Texas Instruments – Fixed and Floating-Point Digital Signal Processor

TMS320C6671
Fixed and Floating-Point Digital Signal Processor
SPRS756E—March 2014
3.3.18 Timer Output Selection Register (TOUTPSEL)
The timer output selection is handled within the control register TOUTSEL. The Timer Output Selection Register
is shown in Figure 3-17 and described in Table 3-19.
Figure 3-17 Timer Output Selection Register (TOUTPSEL)
31
10
9
5
4
0
Reserved
TOUTPSEL1
TOUTPSEL0
R-000000000000000000000000
RW-00001
RW-00000
Legend: R = Read only; RW = Read/Write; -n = value after reset
Table 3-19 Timer Output Selection Register (TOUTPSEL) Field Description
Bit
31-10
9-5
Field
Reserved
TOUTPSEL1
4-0
TOUTPSEL0
End of Table 3-19
Description
Reserved
Output select for TIMO1
00000: TOUTL0
00001: TOUTH0
00010 to 01111: Reserved
10000: TOUTL8
10001: TOUTH8
10010: TOUTL9
10011: TOUTH9
10100: TOUTL10
10101: TOUTH10
Output select for TIMO0
00000: TOUTL0
00001: TOUTH0
00010 to 01111: Reserved
10000: TOUTL8
10001: TOUTH8
10010: TOUTL9
10011: TOUTH9
10100: TOUTL10
10101: TOUTH10
10110: TOUTL11
10111: TOUTH11
11000: TOUTL12
11001: TOUTH12
11010: TOUTL13
11011: TOUTH13
11100: TOUTL14
11101: TOUTH14
11110: TOUTL15
11111: TOUTH15
10110: TOUTL11
10111: TOUTH11
11000: TOUTL12
11001: TOUTH12
11010: TOUTL13
11011: TOUTH13
11100: TOUTL14
11101: TOUTH14
11110: TOUTL15
11111: TOUTH15
3.3.19 Reset Mux Register (RSTMUXx)
The software controls the Reset Mux block through the reset multiplex register (RSTMUX0). This register is located
in Bootcfg memory space. The Reset Mux Register is shown in Figure 3-18 and described in Table 3-20.
Figure 3-18 Reset Mux Register (RSTMUXx)
31
10
9
8
7
5
4
3
1
0
Reserved
EVTSTATCLR
Reserved
DELAY
EVTSTAT
OMODE
LOCK
R-0000 0000 0000 0000 0000 00
RC-0
R-0
RW-100
R-0
RW-000
RW-0
Legend: R = Read only; RW = Read/Write; -n = value after reset; RC = Read only and write 1 to clear
90 Device Configuration
Copyright 2014 Texas Instruments Incorporated
Submit Documentation Feedback