TMS320C6671_15 Datasheet, PDF (164/238 Pages) Texas Instruments – Fixed and Floating-Point Digital Signal Processor

TMS320C6671
Fixed and Floating-Point Digital Signal Processor
SPRS756E—March 2014
Figure 7-32 TMS320C6671 System Event Inputs — C66x CorePac Primary Interrupts (Part 2 of 4)
Input Event Number
16
17
18
19
20
Interrupt Event
SEMINTn ⁽³⁾
PCIExpress_MSI_INTn ⁽⁴⁾
TSIP0_ERRINT[n] ⁽⁵⁾
TSIP1_ERRINT[n] ⁽⁵⁾
INTDST(n+16) ⁽⁶⁾
Description
Semaphore interrupt
Message signaled interrupt mode
TSIP0 receive/transmit error interrupt
TSIP1 receive/transmit error interrupt
SRIO Interrupt
21
CIC0_OUT(32+0+11*n)
Interrupt Controller Output
22
CIC0_OUT(32+1+11*n)
Interrupt Controller Output
23
CIC0_OUT(32+2+11*n)
Interrupt Controller Output
24
CIC0_OUT(32+3+11*n)
Interrupt Controller Output
25
CIC0_OUT(32+4+11*n)
Interrupt Controller Output
26
CIC0_OUT(32+5+11*n)
Interrupt Controller Output
27
CIC0_OUT(32+6+11*n)
Interrupt Controller Output
28
CIC0_OUT(32+7+11*n)
Interrupt Controller Output
29
CIC0_OUT(32+8+11*n)
Interrupt Controller Output
30
CIC0_OUT(32+9+11*n)
Interrupt Controller Output
31
CIC0_OUT(32+10+11*n)
Interrupt Controller Output
32
QM_INT_LOW_0
QM Interrupt for 0~31 Queues
33
QM_INT_LOW_1
QM Interrupt for 32~63 Queues
34
QM_INT_LOW_2
QM Interrupt for 64~95 Queues
35
QM_INT_LOW_3
QM Interrupt for 96~127 Queues
36
QM_INT_LOW_4
QM Interrupt for 128~159 Queues
37
QM_INT_LOW_5
QM Interrupt for 160~191 Queues
38
QM_INT_LOW_6
QM Interrupt for 192~223 Queues
39
QM_INT_LOW_7
QM Interrupt for 224~255 Queues
40
QM_INT_LOW_8
QM Interrupt for 256~287 Queues
41
QM_INT_LOW_9
QM Interrupt for 288~319 Queues
42
QM_INT_LOW_10
QM Interrupt for 320~351 Queues
43
QM_INT_LOW_11
QM Interrupt for 352~383 Queues
44
QM_INT_LOW_12
QM Interrupt for 384~415 Queues
45
QM_INT_LOW_13
QM Interrupt for 416~447 Queues
46
QM_INT_LOW_14
QM Interrupt for 448~479 Queues
47
QM_INT_LOW_15
48
QM_INT_HIGH_n ⁽⁷⁾
49
QM_INT_HIGH_(n+8) ⁽⁷⁾
50
QM_INT_HIGH_(n+16) ⁽⁷⁾
51
QM_INT_HIGH_(n+24) ⁽⁷⁾
52
TSIP0_RFSINT[n] ⁽⁵⁾
53
TSIP0_RSFINT[n] ⁽⁵⁾
54
TSIP0_XFSINT[n] ⁽⁵⁾
55
TSIP0_XSFINT[n] ⁽⁵⁾
56
TSIP1_RFSINT[n] ⁽⁵⁾
57
TSIP1_RSFINT[n] ⁽⁵⁾
58
TSIP1_XFSINT[n] ⁽⁵⁾
59
TSIP1_XSFINT[n] ⁽⁵⁾
QM Interrupt for 480~511 Queues
QM Interrupt for Queue 704+n⁸
QM Interrupt for Queue 712+n⁸
QM Interrupt for Queue 720+n⁸
QM Interrupt for Queue 728+n⁸
TSIP0 receive frame sync interrupt
TSIP0 receive super frame interrupt
TSIP0 transmit frame sync interrupt
TSIP0 transmit super frame interrupt
TSIP1 receive frame sync interrupt
TSIP1 receive super frame interrupt
TSIP1 transmit frame sync interrupt
TSIP1 transmit super frame interrupt
164 Peripheral Information and Electrical Specifications
Copyright 2014 Texas Instruments Incorporated
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