TMS320C6671_15 Datasheet, PDF (49/238 Pages) Texas Instruments – Fixed and Floating-Point Digital Signal Processor

TMS320C6671
Fixed and Floating-Point Digital Signal Processor
SPRS756E—March 2014
Table 2-26 Terminal Functions — Signals and Control by Function (Part 6 of 13)
Signal Name
DDRCAS
DDRRAS
DDRWE
DDRCKE0
DDRCKE1
DDRCLKOUTP0
DDRCLKOUTN0
DDRCLKOUTP1
DDRCLKOUTN1
DDRODT0
DDRODT1
DDRRESET
DDRSLRATE0
DDRSLRATE1
VREFSSTL
EMIFRW
EMIFCE0
EMIFCE1
EMIFCE2
EMIFCE3
EMIFOE
EMIFWE
EMIFBE0
EMIFBE1
EMIFWAIT0
EMIFWAIT1
Ball No. Type
D12 OZ
C10
OZ
E12
OZ
D11 OZ
E18
OZ
A12 OZ
B12
OZ
A16 OZ
B16
OZ
D13 OZ
E13
OZ
E11
OZ
G27 I
H27 I
E14
P
P26
OZ
P25
OZ
R27
OZ
R28
OZ
R25
OZ
R26
OZ
P24
OZ
R24
OZ
R23
OZ
T29
I
T28
I
IPD/IPU
Down
Down
UP
UP
UP
UP
UP
UP
UP
UP
UP
Down
Down
Description
DDR EMIF Column Address Strobe
DDR EMIF Row Address Strobe
DDR EMIF Write Enable
DDR EMIF Clock Enable
DDR EMIF Clock Enable
DDR EMIF Output Clocks to drive SDRAMs (one clock pair per SDRAM)
DDR EMIF On Die Termination Outputs used to set termination on the SDRAMs
DDR EMIF On Die Termination Outputs used to set termination on the SDRAMs
DDR Reset signal
DDR Slew rate control
Reference Voltage Input for SSTL15 buffers used by DDR EMIF (VDDS15 ÷ 2)
EMIF16
EMIF16 Control Signals
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