5962-9958101QXC Datasheet, PDF (9/17 Pages) Texas Instruments – MICROCIRCUIT DATA SHEET

MNAR629A-X REV 0A0
MICROCIRCUIT DATA SHEET
Electrical Characteristics
AC: INTER. REG./REC. VALID & INTERRUPT VECTOR STROBE TIMING
(The following conditions apply to all the following parameters, unless otherwise specified.)
AC: Vdd = Vcc = 5V +5%, Vss = GND, -55 C <TA<+125 C, CL = 50pF
SYMBOL
TDAOA
TDAOZ
TLRERF
PARAMETER
CONDITIONS
Delay from AE Low Vdd = 4.75V, Vdd = 5.25V
to AO active
Delay from AE
High to AO
Tri-State
Vdd = 4.75V, Vdd = 5.25V
RERF Pulse Width Vdd = 5V +5%
TLXERF
XERF Pulse Width Vdd = 5V +5%
NOTES
4
PIN-
NAME
MIN
0
4
0
MAX
25
UNIT
nS
SUB-
GROUPS
9, 10,
11
40
nS 9, 10,
11
7T
nS 9, 10,
11
7T
nS 9, 10,
11
AC: INTERNAL REGISTER/RECEIVE DATA CHARACTERISTICS
(The following conditions apply to all the following parameters, unless otherwise specified.)
AC: Vdd = Vcc = 5V +5%, Vss = GND, -55 C <TA<+125 C, CL = 50pF
TDBRIVS
Delay from BUSQ
to leading RIVS
Low
Vdd = 5V +5%
5
90T
nS
TDBUSQ
Delay from end of
last bit time to
BUSQ
6T-40 7T+46 nS
TDBUSQ1
Delay from last
word of string to
BUSQ
5T-40 7T+46 nS
TDERR
Delay from BUSQ, Vdd = 4.75V, Vdd 5V +5%
to Error Reg.
valid (non-NRBA)
7T
64T
nS
TDERR
Delay from BUSQ, TG = 2; Vdd = 5V +5%
to Error Reg.
valid (NRBA)
160T
nS
TDERR
Delay from BUSQ,
to Error Reg.
valid(NRBA error
on next to last
date word)
Vdd = 5V +5%
292T nS
TDFSTAC
Delay from RIVS
Low to STAC Low
Vdd = 4.75V, Vdd = 5.25V
5T-30 5T+35 nS
TDINT
Delay from BUSQ
to IVR valid
68T
75T
nS
TDLRIVS
Time from RIVS
Low to 12th bit
time
5T
nS
TDLTRIVS
Delay from
leading RIVS to
trailing RIVS
Vdd = 5V +5%
6
31T
nS
9, 10,
11
9, 10,
11
9, 10,
11
9, 10,
11
9, 10,
11
9, 10,
11
9, 10,
11
9, 10,
11
9, 10,
11
9, 10,
11
9