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AMC7812 Datasheet, PDF (74/92 Pages) Texas Instruments – 12-Bit ANALOG MONITORING AND CONTROL SOLUTION with Multichannel ADC, DACs, and Temperature Sensors
AMC7812
SBAS513D – JANUARY 2011 – REVISED OCTOBER 2012
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AUTO-DAC-CLR-EN REGISTER (Read/Write, Address = 54h, Default = 0000h)
MSB
BIT 15
0
BIT 14
ACLR
11
BIT 13
ACLR
10
BIT 12
ACLR
9
BIT 11
ACLR
8
BIT 10
ACLR
7
BIT 9
ACLR
6
BIT 8
ACLR
5
BIT 7
ACLR
4
BIT 6
ACLR
3
BIT 5
ACLR
2
BIT 4
ACLR
1
BIT 3
ACLR
0
BIT 2
0
BIT 1
0
LSB
BIT 0
0
Bits[14:3]
ACLRn: Auto clear DAC-n enable bit.
If ACLRn = '1', DAC-n is forced into a clear state when the alarm occurs.
If ACLRn = '0', DAC-n is not forced into a clear state when the alarm occurs (default).
NOTE
ACLRn is always ignored when an alarm occurs for a temperature greater than +150°C
(THERM-ALR = '1'). If an alarm activates for a temperature greater than +150°C, and if
the THERM-ALR-CLR bit in the AUTO-DAC-CLR-SOURCE Register is set ('1'), all DACs
are forced into a clear status. However, if THERM-ALR-CLR is cleared ('0'), the over
+150°C alarm does not force any DAC to a clear status.
SW-DAC-CLR REGISTER (Read/Write, Address = 55h, Default = 0000h)
This register uses software to force the DAC into a clear state.
MSB
BIT 15 BIT 14 BIT 13 BIT 12 BIT 11 BIT 10
0
ICLR ICLR ICLR ICLR ICLR
11
10
9
8
7
BIT 9
ICLR
6
BIT 8
ICLR
5
BIT 7
ICLR
4
BIT 6
ICLR
3
BIT 5
ICLR
2
BIT 4
ICLR
1
BIT 3
ICLR
0
BIT 2
0
BIT 1
0
LSB
BIT 0
0
Bits[14:3]
ICLRn: Software clear DACn bit.
If ICLRn = '1', DACn is forced into a clear state.
If ICLRn = '0', DACn is restored to normal operation.
HW-DAC-CLR-EN 0 REGISTER (Read/Write, Address = 56h, Default = 0000h)
This register determines which DAC is in a clear state when the DAC-CLR-0 pin goes low.
MSB
BIT
15 BIT 14 BIT 13 BIT 12 BIT 11 BIT 10
BIT 9
BIT 8
BIT 7
BIT 6
BIT 5
BIT 4
BIT
BIT 3 2
0
H0CLR H0CLR H0CLR H0CLR H0CLR H0CLR H0CLR H0CLR H0CLR H0CLR H0CLR H0CLR
11
10
9
8
7
6
5
4
3
2
1
0
0
LSB
BIT BIT
10
00
Bits[14:3]
H0CLRn: Hardware clear DAC-n enable 1 bit.
If H0CLRn = '1', DAC-n is forced into a clear state when the DAC-CLR-0 pin goes low.
If H0CLRn = '0', pulling the DAC-CLR-0 pin low does not effect the state of DAC-n.
74
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