TLC32040C Datasheet, PDF (7/33 Pages) Texas Instruments – ANALOG INTERFACE CIRCUITS

TLC32040C, TLC32040I, TLC32041C, TLC32041I
ANALOG INTERFACE CIRCUITS
SLAS014E – SEPTEMBER 1987 – REVISED MAY 1995
asynchronous versus synchronous operation
If the transmit section of the AIC (low-pass filter and DAC) and receive section (bandpass filter and ADC) are
operated asynchronously, the low-pass and band-pass filter clocks are independently generated from the
master clock signal. Also, the D/A and A/D conversion rates are independently determined. If the transmit and
receive sections are operated synchronously, the low-pass filter clock drives both low-pass and bandpass
filters. In synchronous operation, the A/D conversion timing is derived from, and is equal to, the D/A conversion
timing. (See description of WORD/BYTE in the Terminal Functions table.)
D/A converter performance specifications
Fundamental performance specifications for the D/A converter circuitry are presented in the D/A converter
operating characteristics section of the data sheet. The D/A converter has a sample-and-hold that is realized
with a switched-capacitor ladder.
system frequency response correction
The (sin x) / x correction circuitry is performed in the digital processor software. The system frequency response
can be corrected via DSP software to ± 0.1-dB accuracy to band edge of 3000 Hz for all sampling rates. This
correction is accomplished with a first-order digital correction filter, which requires only seven TMS320
instruction cycles. With a 200-ns instruction cycle, seven instructions represent an overhead factor of only 1.1%
and 1.3% for sampling rates of 8 and 9.6 kHz, respectively (see the (sin x) / x correction section for more details).
serial port
The serial port has four possible modes that are described in detail in the Terminal Functions table. These
modes are briefly described below and in the description for WORD/BYTE in the Terminal Functions Table.
D The transmit and receive sections are operated asynchronously, and the serial port interfaces directly with
the TMS32011 and TMS320C17.
D The transmit and receive sections are operated asynchronously, and the serial port interfaces directly with
the TMS32020 and the TMS320C25.
D The transmit and receive sections are operated synchronously, and the serial port interfaces directly with
the TMS32011 and TMS320C17.
D The transmit and receive sections are operated synchronously, and the serial port interfaces directly with
the TMS32020, TMS320C25, or two SN74299 serial-to-parallel shift registers, which can then interface in
parallel to the TMS320C10, TMS32015, to any other digital signal processor, or to external FIFO circuitry.
operation of TLC32040 with internal voltage reference
The internal reference of the TLC32040 eliminates the need for an external voltage reference and provides
overall circuit cost reduction. Thus, the internal reference eases the design task and provides complete control
over the performance of this integrated circuit. The internal reference is brought out to a terminal and is available
to the designer. To keep the amount of noise on the reference signal to a minimum, an external capacitor may
be connected between REF and ANLG GND.
operation of TLC32040 or TLC32041 with external voltage reference
REF can be driven from an external reference circuit if so desired. This external circuit must be capable of
supplying 250 µA and must be adequately protected from noise such as crosstalk from the analog input.
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