BQ24292I Datasheet, PDF (7/42 Pages) Texas Instruments – I2C Controlled 4.5A Single Cell USB/Adapter Charger With Narrow VDC Power Path Management and USB OTG

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PIN
NAME
BAT
SYS
PGND
SW
BTST
REGN
PMID
PowerPAD
PIN FUNCTIONS (continued)
bq24292i
SLUSBI4 – APRIL 2013
NO.
13,14
15,16
17,18
19,20
21
22
23
–
TYPE
P
P
P
O
Analog
P
P
O
Analog
P
DESCRIPTION
Battery connection point to the positive terminal of the battery pack. The internal BATFET is connected between BAT and
SYS. Connect a 10uF closely to the BAT pin.
System connection point. The internal BATFET is connected between BAT and SYS. When the battery falls below the
minimum system voltage, switch-mode converter keeps SYS above the minimum system voltage. (Refer to Application
Information Section for inductor and capacitor selection)
Power ground connection for high-current power converter node. Internally, PGND is connected to the source of the n-
channel LSFET. On PCB layout, connect directly to ground connection of input and output capacitors of the charger. A
single point connection is recommended between power PGND and the analog GND near the IC PGND pin.
Switching node connecting to output inductor. Internally SW is connected to the source of the n-channel HSFET and the
drain of the n-channel LSFET. Connect the 0.047µF bootstrap capacitor from SW to BTST.
PWM high side driver positive supply. Internally, the BTST is connected to the anode of the boost-strap diode. Connect
the 0.047µF bootstrap capacitor from SW to BTST.
PWM low side driver positive supply output. Internally, REGN is connected to the cathode of the boost-strap diode. For
VBUS above 6V, connect 1-µF ceramic capacitor from REGN to analog GND. For VBUS below 6V, connect a 4.7-μF
(10V rating) ceramic capacitor from REGN to analog GND. The capacitor should be placed close to the IC. REGN also
serves as bias rail of TS1 and TS2 pins.
Connected to the drain of the reverse blocking MOSFET and the drain of HSFET. Given the total input capacitance,
connect a 1-µF capacitor on VBUS to PGND, and the rest all on PMID to PGND. (See the Application Information section
for details)
Exposed pad beneath the IC for heat dissipation. Always solder PowerPAD™ to the board, and have vias on the Power
Pad plane star-connecting to PGND and ground plane for high-current power converter.
ABSOLUTE MAXIMUM RATINGS
Voltage range (with respect to GND)
Output sink current
Junction temperature
Storage temperature
VBUS
PMID, STAT, PG
BTST
SW
BAT, SYS (converter not switching)
SDA, SCL, INT, OTG, ILIM, REGN, TS1, TS2, CE,
PSEL
BTST TO SW
PGND to GND
INT, STAT, PG
VALUE
MIN
MAX
–2
20
–0.3
20
–0.3
26
–2 V
20
–0.3
6
–0.3
7
–0.3
7
–0.3
0.3
6
–40
150
–65
150
UNIT
V
V
V
V
V
V
V
V
mA
°C
°C
RECOMMENDED OPERATING CONDITIONS
V_IN
I_IN
I_SYS
V_BAT
Input voltage
Input current
Output current (SYS)
Battery voltage
Fast charging current\
MIN
MAX
UNIT
3.9
17 ⁽¹⁾
V
3
A
4.5
A
4.4
V
4.5
A
I_{BAT Discharging current with internal MOSFET}
6 (continuous)
9 (peak)
A
(up to 1 sec duration)
T_A
Operating free-air temperature range
–40
85
°C
(1) The inherent switching noise voltage spikes should not exceed the absolute maximum rating on either the BTST or SW pins. A tight
layout minimizes switching noise.
Copyright © 2013, Texas Instruments Incorporated
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